[U-Boot] [PATCH v2 07/10] spi: Use BIT macro

[Jagan Teki]

Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n

Cc: Simon Glass <sjg at chromium.org>
Cc: Michal Simek <michal.simek at xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur at xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm at ti.com>
Tested-by: Bin Meng <bmeng.cn at gmail.com>
Tested-by: Jagan Teki <jteki at openedev.com>
Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
Signed-off-by: Jagan Teki <jteki at openedev.com>
---
 include/spi.h | 38 +++++++++++++++++++-------------------
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/include/spi.h b/include/spi.h
index 82e72ab..f889249 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -11,26 +11,26 @@
 #define _SPI_H_
 
 /* SPI mode flags */
-#define	SPI_CPHA	0x01			/* clock phase */
-#define	SPI_CPOL	0x02			/* clock polarity */
+#define	SPI_CPHA	BIT(0)			/* clock phase */
+#define	SPI_CPOL	BIT(1)			/* clock polarity */
 #define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
 #define	SPI_MODE_1	(0|SPI_CPHA)
 #define	SPI_MODE_2	(SPI_CPOL|0)
 #define	SPI_MODE_3	(SPI_CPOL|SPI_CPHA)
-#define	SPI_CS_HIGH	0x04			/* CS active high */
-#define	SPI_LSB_FIRST	0x08			/* per-word bits-on-wire */
-#define	SPI_3WIRE	0x10			/* SI/SO signals shared */
-#define	SPI_LOOP	0x20			/* loopback mode */
-#define	SPI_SLAVE	0x40			/* slave mode */
-#define	SPI_PREAMBLE	0x80			/* Skip preamble bytes */
-#define SPI_TX_BYTE	0x100			/* transmit with 1 wire byte */
-#define SPI_TX_QUAD	0x200			/* transmit with 4 wires */
+#define	SPI_CS_HIGH	BIT(2)			/* CS active high */
+#define	SPI_LSB_FIRST	BIT(3)			/* per-word bits-on-wire */
+#define	SPI_3WIRE	BIT(4)			/* SI/SO signals shared */
+#define	SPI_LOOP	BIT(5)			/* loopback mode */
+#define	SPI_SLAVE	BIT(6)			/* slave mode */
+#define	SPI_PREAMBLE	BIT(7)			/* Skip preamble bytes */
+#define SPI_TX_BYTE	BIT(8)			/* transmit with 1 wire byte */
+#define SPI_TX_QUAD	BIT(9)			/* transmit with 4 wires */
 
 /* SPI mode_rx flags */
-#define SPI_RX_SLOW		(1 << 0)
-#define SPI_RX_FAST		(1 << 1)
-#define SPI_RX_DUAL		(1 << 2)
-#define SPI_RX_QUAD		(1 << 4)
+#define SPI_RX_SLOW		BIT(0)	
+#define SPI_RX_FAST		BIT(1)
+#define SPI_RX_DUAL		BIT(2)
+#define SPI_RX_QUAD		BIT(4)
 
 /* SPI bus connection options - see enum spi_dual_flash */
 #define SPI_CONN_DUAL_SHARED		(1 << 0)
@@ -116,12 +116,12 @@ struct spi_slave {
 	u8 option;
 
 	u8 flags;
-#define SPI_XFER_BEGIN		0x01	/* Assert CS before transfer */
-#define SPI_XFER_END		0x02	/* Deassert CS after transfer */
+#define SPI_XFER_BEGIN		BIT(0)	/* Assert CS before transfer */
+#define SPI_XFER_END		BIT(1)	/* Deassert CS after transfer */
 #define SPI_XFER_ONCE		(SPI_XFER_BEGIN | SPI_XFER_END)
-#define SPI_XFER_MMAP		0x04	/* Memory Mapped start */
-#define SPI_XFER_MMAP_END	0x08	/* Memory Mapped End */
-#define SPI_XFER_U_PAGE		0x10
+#define SPI_XFER_MMAP		BIT(2)	/* Memory Mapped start */
+#define SPI_XFER_MMAP_END	BIT(3)	/* Memory Mapped End */
+#define SPI_XFER_U_PAGE		BIT(4)
 };
 
 /**
-- 
1.9.1