[U-Boot] [PATCH v3 03/12] x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig

[Bin Meng]

Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
options so that we can remove them from board configuration file.

Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
Acked-by: Simon Glass <sjg at chromium.org>

---

Changes in v3: None
Changes in v2:
- New patch to move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16
  to Kconfig

 arch/x86/Kconfig                     | 9 +++++++++
 board/google/chromebook_link/Kconfig | 1 +
 board/intel/crownbay/Kconfig         | 1 +
 include/configs/chromebook_link.h    | 2 --
 include/configs/crownbay.h           | 2 --
 5 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 4bd945e..76dc02d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -70,6 +70,15 @@ config SMM_TSEG
 config SMM_TSEG_SIZE
 	hex
 
+config X86_RESET_VECTOR
+	bool
+	default n
+
+config SYS_X86_START16
+	hex
+	depends on X86_RESET_VECTOR
+	default 0xfffff800
+
 config BOARD_ROMSIZE_KB_512
 	bool
 config BOARD_ROMSIZE_KB_1024
diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig
index 7f79fd2..a9a55e8 100644
--- a/board/google/chromebook_link/Kconfig
+++ b/board/google/chromebook_link/Kconfig
@@ -14,6 +14,7 @@ config SYS_CONFIG_NAME
 
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
+	select X86_RESET_VECTOR
 	select CPU_INTEL_SOCKET_RPGA989
 	select NORTHBRIDGE_INTEL_IVYBRIDGE
 	select SOUTHBRIDGE_INTEL_C216
diff --git a/board/intel/crownbay/Kconfig b/board/intel/crownbay/Kconfig
index 4709f9b..762663a 100644
--- a/board/intel/crownbay/Kconfig
+++ b/board/intel/crownbay/Kconfig
@@ -14,6 +14,7 @@ config SYS_CONFIG_NAME
 
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
+	select X86_RESET_VECTOR
 	select INTEL_QUEENSBAY
 	select BOARD_ROMSIZE_KB_1024
 
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index 8930210..449f0c2 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -19,11 +19,9 @@
 #define CONFIG_SYS_CAR_SIZE			(128 * 1024)
 #define CONFIG_SYS_MONITOR_LEN			(1 << 20)
 #define CONFIG_DCACHE_RAM_MRC_VAR_SIZE		0x4000
-#define CONFIG_SYS_X86_START16			0xfffff800
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_DISPLAY_CPUINFO
 
-#define CONFIG_X86_RESET_VECTOR
 #define CONFIG_NR_DRAM_BANKS			8
 #define CONFIG_X86_MRC_ADDR			0xfffa0000
 #define CONFIG_CACHE_MRC_SIZE_KB		512
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index eadb339..b927b1c 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -14,10 +14,8 @@
 #include <configs/x86-common.h>
 
 #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
-#define CONFIG_SYS_X86_START16		0xfffff800
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define CONFIG_X86_RESET_VECTOR
 #define CONFIG_NR_DRAM_BANKS		1
 
 #define CONFIG_X86_SERIAL
-- 
1.8.2.1