[U-Boot] [PATCH 6/8] video: ssd2828: Allow using 'pclk' as the PLL clock source

[Anatolij Gustschin]

On Fri,  9 Jan 2015 12:01:14 +0200
Siarhei Siamashka <siarhei.siamashka at gmail.com> wrote:

> Instead of using the internal 'tx_clk' clock source, it is also
> possible to use the pixel clock signal from the parallel LCD
> interface ('pclk') as the reference clock for PLL.
> 
> The 'tx_clk' clock speed may be different on different boards/devices
> (the allowed range is 8MHz - 30MHz). Which is not very convenient,
> especially considering the need to know the exact 'tx_clk' clock
> speed. Which may be difficult to identify without having device
> schematics and/or accurate documentation/sources every time.
> 
> Using 'pclk' is free from all these problems.
> 
> Signed-off-by: Siarhei Siamashka <siarhei.siamashka at gmail.com>

Acked-by: Anatolij Gustschin <agust at denx.de>