[U-Boot] [PATCH 08/18] exynos5: config: prepare for dm i2c support

Akshay Saraswat akshay.s at samsung.com
Fri Jan 9 10:21:15 CET 2015


Hi Przemyslaw,

>This commit allows for test i2c drivers with new i2c api
>on Exynos5xxx based boards.
>
>The S3C24X0 I2C driver supports driver model I2C api,
>but i2c peripherials drivers on exynos5 boards doesn't.
>So this commit allows for test ported driver before switch
>the Exynos5 boards to DM I2C at all.
>
>Signed-off-by: Przemyslaw Marczak <p.marczak at samsung.com>
>Cc: Akshay Saraswat <akshay.s at samsung.com>
>Cc: Simon Glass <sjg at chromium.org>
>Cc: Minkyu Kang <mk7.kang at samsung.com>
>---
> include/configs/exynos5-common.h | 29 ++++++++++++++++++-----------
> 1 file changed, 18 insertions(+), 11 deletions(-)
>
>diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
>index ad63f3c..b7af8a5 100644
>--- a/include/configs/exynos5-common.h
>+++ b/include/configs/exynos5-common.h
>@@ -54,13 +54,6 @@
> #define CONFIG_CMD_DTT
> #define CONFIG_TMU_CMD_DTT
> 
>-/* TPM */
>-#define CONFIG_TPM
>-#define CONFIG_CMD_TPM
>-#define CONFIG_TPM_TIS_I2C
>-#define CONFIG_TPM_TIS_I2C_BUS_NUMBER	3
>-#define CONFIG_TPM_TIS_I2C_SLAVE_ADDR	0x20
>-
> /* MMC SPL */
> #define COPY_BL2_FNPTR_ADDR	0x02020030
> #define CONFIG_SUPPORT_EMMC_BOOT
>@@ -126,15 +119,29 @@
> #define SPI_FLASH_UBOOT_POS	(CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
> 
> /* I2C */
>-#define CONFIG_SYS_I2C_INIT_BOARD
>-#define CONFIG_SYS_I2C
>+#if 0 /* For test */

Quick test over SMDK 5250 after replacing #if 0 -> 1.
Looks like there is some problem in changing bus beyond 7.
Please check.

Console prints are as follows -

SMDK5250 # i2c dev 8
Setting bus to 8
Failure changing bus number (-19)
exit not allowed from main input shell.

>+#define CONFIG_DM_I2C
>+#endif
> #define CONFIG_CMD_I2C
>-#define CONFIG_SYS_I2C_S3C24X0_SPEED	100000		/* 100 Kbps */
> #define CONFIG_SYS_I2C_S3C24X0
>-#define CONFIG_I2C_MULTI_BUS
>+#define CONFIG_SYS_I2C_S3C24X0_SPEED	100000		/* 100 Kbps */
> #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0x0
>+#ifndef CONFIG_DM_I2C
>+#define CONFIG_SYS_I2C_INIT_BOARD
>+#define CONFIG_SYS_I2C
>+#define CONFIG_I2C_MULTI_BUS
>+#endif /* ifndef CONFIG_DM_I2C */
> #define CONFIG_I2C_EDID
> 
>+/* TPM */
>+#ifndef CONFIG_DM_I2C
>+#define CONFIG_TPM
>+#define CONFIG_CMD_TPM
>+#define CONFIG_TPM_TIS_I2C
>+#define CONFIG_TPM_TIS_I2C_BUS_NUMBER	3
>+#define CONFIG_TPM_TIS_I2C_SLAVE_ADDR	0x20
>+#endif
>+
> /* SPI */
> #ifdef CONFIG_SPI_FLASH
> #define CONFIG_EXYNOS_SPI
>-- 
>1.9.1

Regards,
Akshay Saraswat


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