[U-Boot] [PATCH] m68k: remove TASREG board

Matthias Fuchs matthias.fuchs at esd.eu
Mon Jan 12 22:33:38 CET 2015


Signed-off-by: Matthias Fuchs <matthias.fuchs at esd.eu>
---
 arch/m68k/Kconfig            |    4 -
 board/esd/tasreg/Kconfig     |   15 -
 board/esd/tasreg/MAINTAINERS |    6 -
 board/esd/tasreg/Makefile    |    8 -
 board/esd/tasreg/config.mk   |    9 -
 board/esd/tasreg/flash.c     |   59 -
 board/esd/tasreg/fpgadata.c  |10661 ------------------------------------------
 board/esd/tasreg/tasreg.c    |  432 --
 board/esd/tasreg/u-boot.lds  |   82 -
 configs/TASREG_defconfig     |    2 -
 doc/README.scrapyard         |    1 +
 include/configs/TASREG.h     |  287 --
 12 files changed, 1 insertion(+), 11565 deletions(-)
 delete mode 100644 board/esd/tasreg/Kconfig
 delete mode 100644 board/esd/tasreg/MAINTAINERS
 delete mode 100644 board/esd/tasreg/Makefile
 delete mode 100644 board/esd/tasreg/config.mk
 delete mode 100644 board/esd/tasreg/flash.c
 delete mode 100644 board/esd/tasreg/fpgadata.c
 delete mode 100644 board/esd/tasreg/tasreg.c
 delete mode 100644 board/esd/tasreg/u-boot.lds
 delete mode 100644 configs/TASREG_defconfig
 delete mode 100644 include/configs/TASREG.h

diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 5374b4d..78c98ed 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -19,9 +19,6 @@ config TARGET_COBRA5272
 config TARGET_EB_CPU5282
 	bool "Support eb_cpu5282"
 
-config TARGET_TASREG
-	bool "Support TASREG"
-
 config TARGET_M5208EVBE
 	bool "Support M5208EVBE"
 
@@ -75,7 +72,6 @@ endchoice
 source "board/BuS/eb_cpu5282/Kconfig"
 source "board/astro/mcf5373l/Kconfig"
 source "board/cobra5272/Kconfig"
-source "board/esd/tasreg/Kconfig"
 source "board/freescale/m5208evbe/Kconfig"
 source "board/freescale/m52277evb/Kconfig"
 source "board/freescale/m5235evb/Kconfig"
diff --git a/board/esd/tasreg/Kconfig b/board/esd/tasreg/Kconfig
deleted file mode 100644
index 85417d4..0000000
--- a/board/esd/tasreg/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_TASREG
-
-config SYS_CPU
-	default "mcf52x2"
-
-config SYS_BOARD
-	default "tasreg"
-
-config SYS_VENDOR
-	default "esd"
-
-config SYS_CONFIG_NAME
-	default "TASREG"
-
-endif
diff --git a/board/esd/tasreg/MAINTAINERS b/board/esd/tasreg/MAINTAINERS
deleted file mode 100644
index 10bc7a4..0000000
--- a/board/esd/tasreg/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-TASREG BOARD
-M:	Matthias Fuchs <matthias.fuchs at esd-electronics.com>
-S:	Maintained
-F:	board/esd/tasreg/
-F:	include/configs/TASREG.h
-F:	configs/TASREG_defconfig
diff --git a/board/esd/tasreg/Makefile b/board/esd/tasreg/Makefile
deleted file mode 100644
index 46f2550..0000000
--- a/board/esd/tasreg/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= tasreg.o flash.o
diff --git a/board/esd/tasreg/config.mk b/board/esd/tasreg/config.mk
deleted file mode 100644
index 40f7570..0000000
--- a/board/esd/tasreg/config.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn at metrowerks.com>
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-CONFIG_SYS_TEXT_BASE = 0xffc00000
diff --git a/board/esd/tasreg/flash.c b/board/esd/tasreg/flash.c
deleted file mode 100644
index 7138881..0000000
--- a/board/esd/tasreg/flash.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese at esd-electronics.com
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-/*#include <asm/ppc4xx.h>*/
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-	unsigned long size_b0;
-	int i;
-
-	/* Init: no FLASHes known */
-	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-	}
-
-	/* Static FLASH Bank configuration here - FIXME XXX */
-
-	size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
-	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
-		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
-			size_b0, size_b0<<20);
-	}
-
-	/* Setup offsets */
-	flash_get_offsets (-size_b0, &flash_info[0]);
-
-	/* test-only: todo: Re-do sizing to get full correct info */
-
-	/* Monitor protection ON by default */
-	(void)flash_protect(FLAG_PROTECT_SET,
-			    CONFIG_SYS_FLASH_BASE,
-			    CONFIG_SYS_FLASH_BASE+CONFIG_SYS_MONITOR_LEN-1,
-			    &flash_info[0]);
-
-	flash_info[0].size = size_b0;
-
-	return (size_b0);
-}
diff --git a/board/esd/tasreg/fpgadata.c b/board/esd/tasreg/fpgadata.c
deleted file mode 100644
index 427b1d0..0000000
--- a/board/esd/tasreg/fpgadata.c
+++ /dev/null
@@ -1,10661 +0,0 @@
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-0x50, 0x4c, 0x18, 0x4c, 0x0e, 0xd8, 0x86, 0x85,
-0x97, 0x93, 0xcc, 0xd0, 0xc1, 0x28, 0x73, 0xf0,
-0xb2, 0x21, 0xd8, 0xfb, 0x17, 0xee, 0x4d, 0x42,
-0xa9, 0x36, 0x1f, 0xf6, 0x14, 0x99, 0x1b, 0xf6,
-0x26, 0x25, 0x73, 0xb7, 0xa7, 0x30, 0x97, 0x6d,
-0x64, 0xf3, 0xc6, 0xec, 0x5f, 0xf6, 0x7a, 0x19,
-0xe2, 0x32, 0xf2, 0x19, 0x92, 0x6b, 0x28, 0x09,
-0x72, 0x2f, 0x79, 0x94, 0x4c, 0x02, 0x9f, 0x44,
-0xac, 0x20, 0xd7, 0xe0, 0x6e, 0x95, 0x60, 0x1b,
-0x66, 0xae, 0x71, 0x1b, 0xd5, 0x70, 0xdb, 0x16,
-0x0d, 0x68, 0xb9, 0x57, 0xf8, 0x0c, 0x99, 0x64,
-0x5c, 0x83, 0x5d, 0x8f, 0xc2, 0x05, 0xf3, 0x9c,
-0xf5, 0x8a, 0xc9, 0xb5, 0xc2, 0xb5, 0xf8, 0xe6,
-0x4a, 0xca, 0xcb, 0x85, 0x02, 0x61, 0x3e, 0x25,
-0x69, 0x71, 0x3a, 0xdc, 0x87, 0x0d, 0xb4, 0x39,
-0x2d, 0x07, 0x84, 0x35, 0x44, 0x4a, 0xc2, 0x7d,
-0xb8, 0x3c, 0xa7, 0xa0, 0x75, 0x29, 0xde, 0x7e,
-0xcb, 0x61, 0xf0, 0x7c, 0xe8, 0xca, 0x0d, 0xc0,
-0x18, 0xf8, 0x2b, 0xeb, 0x3e, 0x6c, 0x86, 0x97,
-0xe4, 0x0c, 0x4d, 0xd1, 0x00, 0x0b, 0xaf, 0x25,
-0x65, 0x86, 0x57, 0x13, 0x65, 0xad, 0x97, 0xe8,
-0xcc, 0x20, 0x7d, 0x06, 0x26, 0x0a, 0x34, 0x4e,
-0x26, 0xac, 0x85, 0x42, 0x0b, 0x1a, 0x0a, 0xb1,
-0x0c, 0xa4, 0x45, 0x73, 0xf6, 0x1d, 0x92, 0x43,
-0x6e, 0x9a, 0x97, 0xdf, 0x2c, 0xb5, 0x90, 0xef,
-0xca, 0x33, 0x69, 0x7e, 0x4b, 0xa3, 0x66, 0x34,
-0x21, 0xb8, 0xc6, 0xa8, 0xe7, 0x2f, 0xe1, 0x1f,
-0x51, 0x9a, 0xa5, 0x3b, 0xc9, 0xf3, 0xf2, 0x0c,
-0xc3, 0x6b, 0xc0, 0x3f, 0xfa, 0xe7, 0xf2, 0x4d,
-0x80, 0x04, 0x1b, 0x9b, 0xb5, 0x2f, 0xc3, 0x3f,
-0x9a, 0xdf, 0xdc, 0x58, 0x42, 0x9c, 0x7d, 0xb9,
-0x51, 0x5e, 0xd2, 0x5b, 0x1a, 0x9a, 0x3f, 0x59,
-0x58, 0x85, 0x1b, 0x59, 0xcb, 0x7c, 0x2f, 0xdb,
-0xa4, 0x4a, 0x43, 0xb9, 0x60, 0x10, 0x34, 0x9c,
-0x16, 0xb8, 0x21, 0x25, 0x39, 0x66, 0xb2, 0x96,
-0x49, 0x6c, 0xd7, 0x9b, 0xe4, 0xda, 0xbf, 0x0c,
-0x4e, 0xc0, 0x44, 0xb4, 0xd6, 0x6c, 0xe0, 0xdc,
-0x00, 0x3e, 0x8b, 0xac, 0xbb, 0x3d, 0x14, 0x14,
-0xba, 0xb3, 0x06, 0xf3, 0x16, 0x70, 0x2a, 0x9c,
-0xdf, 0x25, 0x44, 0x9b, 0x96, 0x14, 0x96, 0xca,
-0xf3, 0x85, 0xf5, 0xdc, 0x97, 0x60, 0x78, 0x39,
-0x56, 0x58, 0xfa, 0x00, 0x62, 0x61, 0x0e, 0x9c,
-0x05, 0x68, 0x69, 0x28, 0x64, 0x78, 0x79, 0xad,
-0x1c, 0xd3, 0xf0, 0xdc, 0x95, 0xe3, 0x65, 0xb9,
-0xa1, 0xcc, 0xf6, 0xc3, 0x61, 0xff, 0x6a, 0x6a,
-0xd6, 0x4a, 0xe4, 0x5b, 0x73, 0x60, 0xdb, 0x6a,
-0x2e, 0x2c, 0x91, 0x73, 0x84, 0x42, 0xc3, 0x40,
-0xe3, 0x56, 0x30, 0x78, 0x97, 0xf0, 0x12, 0xb4,
-0x08, 0x25, 0x39, 0x39, 0x85, 0xd8, 0xa5, 0xe1,
-0x18, 0x81, 0xb5, 0xc8, 0x82, 0xa0, 0x19, 0xf6,
-0xf3, 0xa5, 0xc0, 0x0a, 0x94, 0xc4, 0x73, 0xc8,
-0x03, 0xf0, 0x40, 0x13, 0xed, 0x41, 0x3c, 0x2c,
-0x0a, 0x35, 0x60, 0x8b, 0xde, 0x4a, 0x62, 0x77,
-0xf0, 0xa7, 0x3f, 0x1a, 0x6b, 0x60, 0xa2, 0x39,
-0xec, 0x11, 0x2f, 0x11, 0x73, 0x74, 0x21, 0xca,
-0x5e, 0x0c, 0x38, 0xc6, 0xfa, 0x08, 0x80, 0x7c,
-0x3b, 0x48, 0x12, 0x89, 0x26, 0xcb, 0x6c, 0x2c,
-0x5c, 0x26, 0xb6, 0x62, 0x0b, 0x82, 0xe2, 0x56,
-0x6c, 0x21, 0x1e, 0x22, 0x52, 0x92, 0x6c, 0x06,
-0xa3, 0xd0, 0x1e, 0x93, 0x83, 0x06, 0x09, 0x64,
-0xf6, 0xaf, 0xcf, 0x03, 0xf2, 0x6d, 0x1f, 0x28,
-0x9b, 0xb9, 0x16, 0x8c, 0x28, 0x40, 0xe0, 0x99,
-0x0f, 0x7c, 0x5e, 0xf8, 0x92, 0xd2, 0x6e, 0x96,
-0xcd, 0xcc, 0xff, 0xbc, 0x28, 0x18, 0xe6, 0xc0,
-0x55, 0x21, 0xe5, 0xf3, 0x52, 0xb1, 0xd1, 0x07,
-0x5d, 0xde, 0xcf, 0x4b, 0x5f, 0x6c, 0x6a, 0x7f,
-0x69, 0xea, 0x4c, 0x25, 0xbf, 0xf8, 0x4b, 0xc6,
-0x09, 0xf8, 0x2b, 0x7b, 0xff, 0x82, 0x79, 0x06,
-0x0f, 0x7f, 0x33, 0x3a, 0xff, 0xfd, 0xb9, 0xe8,
-0xf3, 0xff, 0xad, 0x0b, 0x17, 0xf4, 0x4f, 0x6a,
-0x01, 0x50, 0xfc, 0x39, 0x5d, 0xe8, 0x9f, 0x74,
-0x0f, 0xb9, 0x2b, 0xfe, 0x39, 0x80, 0xc9, 0x62,
-0x8b, 0xb0, 0x89, 0xfe, 0xb3, 0x6b, 0x8c, 0x69,
-0xff, 0xb0, 0x72, 0xc5, 0x30, 0xb5, 0x50, 0x3b,
-0x7a, 0x59, 0x60, 0xcc, 0x90, 0xd7, 0x0a, 0x88,
-0x97, 0x11, 0x0b, 0x2f, 0x01, 0x50, 0x6c, 0x02,
-0x82, 0xf6, 0x2e, 0x29, 0xd7, 0xa2, 0x07, 0x39,
-0x5e, 0xd6, 0x0c, 0x40, 0xd0, 0x2e, 0xbc, 0x3c,
-0xcf, 0xbe, 0x0c, 0xe0, 0xe5, 0xcf, 0x5d, 0x02,
-0xe4, 0xfb, 0x9d, 0x1f, 0xd6, 0xff, 0x61, 0xd1,
-0x85, 0x7f, 0xbb, 0x72, 0xef, 0x95, 0x67, 0xb9,
-0x01, 0xe0, 0xf1, 0xfa, 0x3f, 0x30, 0x50, 0xfc,
-0x9d, 0x4b, 0xf5, 0x68, 0x5c, 0xfe, 0x7f, 0x0b,
-0x2f, 0x4f, 0x7a, 0xfa, 0xe5, 0x17, 0x53, 0xd6,
-0xf7, 0x79, 0xf7, 0xde, 0x5d, 0xcf, 0x06, 0x7f,
-0xb5, 0xe0, 0x3e, 0x06, 0x9c, 0xa7, 0xfc, 0x6a,
-0x01, 0x22, 0xe8, 0x6f, 0xad, 0x80, 0x96, 0xfb,
-0x0f, 0xbe, 0x9a, 0xba, 0xb0, 0x22, 0x62, 0x61,
-0xea, 0xff, 0x1b, 0x8c, 0xfb, 0xd9, 0x18, 0xe7,
-0x3a, 0x35, 0x75, 0x9f, 0x7b, 0xf1, 0xdf, 0x6a,
-0xfa, 0xac, 0xeb, 0x7c, 0x78, 0xef, 0xf1, 0x67,
-0x6b, 0x6e, 0x5e, 0x78, 0x81, 0x01, 0xe7, 0xeb,
-0x6f, 0x66, 0x08, 0xfa, 0xdb, 0x67, 0xa1, 0xe5,
-0x4a, 0x71, 0xa4, 0xef, 0xe2, 0xd9, 0x7a, 0x0b,
-0x53, 0x5f, 0x02, 0xe3, 0x0a, 0x1b, 0xe3, 0x5c,
-0x67, 0xce, 0x14, 0xa3, 0xaf, 0x68, 0xc6, 0xa0,
-0x57, 0x98, 0xd3, 0xf2, 0x85, 0xe7, 0x1e, 0xd9,
-0x25, 0x9f, 0xb9, 0x65, 0x8e, 0x16, 0x7d, 0x6e,
-0xc3, 0x8c, 0xf6, 0x77, 0x47, 0x25, 0xed, 0x0b,
-0x2f, 0x14, 0xef, 0x1a, 0xcc, 0x1f, 0x85, 0xae,
-0xd7, 0x1e, 0x49, 0xb5, 0x9f, 0xf9, 0xe6, 0x9c,
-0x95, 0xd1, 0x57, 0x8b, 0x6e, 0x6e, 0x5f, 0xfb,
-0xcd, 0x39, 0xa5, 0x5f, 0x78, 0x0d, 0xc7, 0x9c,
-0x76, 0xae, 0x23, 0xb6, 0x93, 0x2d, 0x24, 0xf0,
-0x8f, 0x1e, 0x8d, 0x1b, 0x86, 0xdb, 0x58, 0x15,
-0xca, 0xb4, 0x1c, 0x75, 0x77, 0x79, 0x0f, 0xda,
-0x63, 0x9c, 0xcb, 0xb8, 0x42, 0x83, 0xcc, 0x11,
-0x23, 0xee, 0x50, 0x86, 0x65, 0x64, 0x87, 0x0f,
-0x49, 0x56, 0x97, 0x73, 0x42, 0xd6, 0x8e, 0xcc,
-0x5b, 0x06, 0x7b, 0x29, 0x4c, 0x64, 0x74, 0xb0,
-0x54, 0x2b, 0x71, 0x8c, 0xe1, 0x74, 0x11, 0x6b,
-0xe7, 0xb1, 0xbe, 0xc6, 0x3f, 0xea, 0x13, 0x7c,
-0x0d, 0x65, 0x52, 0x38, 0xd3, 0x72, 0xd4, 0xd5,
-0xe5, 0x0e, 0x70, 0x3a, 0xbf, 0x8b, 0x8e, 0x3b,
-0xf8, 0x03, 0xe3, 0xe8, 0xb8, 0x96, 0x8f, 0x33,
-0xf8, 0xef, 0xfa, 0x4f, 0x0f, 0xff, 0x63, 0x57,
-0x62, 0xd7, 0x61, 0x34, 0x77, 0x1d, 0xfc, 0x7d,
-0xc9, 0x0d, 0x36, 0xa2, 0x03, 0x46, 0x58, 0x2d,
-0xe2, 0x98, 0x2e, 0x85, 0x0d, 0x26, 0x56, 0x8b,
-0xfd, 0x99, 0xf8, 0x1f, 0x39, 0xfa, 0x9f, 0xfd,
-0x46, 0xf6, 0xf7, 0x91, 0x3d, 0xed, 0xe2, 0x16,
-0xb2, 0xdd, 0x98, 0xae, 0xfd, 0x69, 0x86, 0x28,
-0xd8, 0xbf, 0x6b, 0xfc, 0x32, 0xfd, 0xef, 0x18,
-0xce, 0xfc, 0x7c, 0xd2, 0xfd, 0xf3, 0x49, 0x06,
-0xb1, 0xef, 0x9f, 0x49, 0x21, 0xe1, 0x28, 0xf9,
-0x47, 0x32, 0xd9, 0xfc, 0x93, 0x8c, 0x83, 0xf2,
-0x7f, 0xe5, 0xfb, 0x4c, 0x36, 0xed, 0x16, 0x31,
-0x73, 0x23, 0xfe, 0x09, 0xb7, 0x8d, 0xe6, 0xb4,
-0x64, 0x3e, 0x7f, 0xca, 0xcd, 0xa7, 0x65, 0xdf,
-0x85, 0x38, 0x3f, 0xe6, 0x1f, 0x7b, 0x59, 0x7e,
-0xdc, 0xc7, 0x9b, 0xf9, 0x2b, 0x9e, 0x1f, 0x15,
-0xfa, 0x53, 0xae, 0x92, 0x75, 0x45, 0x83, 0xfd,
-0x2f, 0xa4, 0xff, 0x57, 0xaf, 0x63, 0x4d, 0xd1,
-0x24, 0xf3, 0xbf, 0x78, 0x21, 0x61, 0xf8, 0xbf,
-0x78, 0x81, 0xff, 0x43, 0x9f, 0xfa, 0x2b, 0x57,
-0xae, 0x98, 0x7f, 0xba, 0xf1, 0xe9, 0x75, 0xfe,
-0x5f, 0xbe, 0xce, 0x04, 0xdb, 0xf1, 0xff, 0x8e,
-0xe1, 0x5c, 0xe7, 0xbf, 0xf8, 0x5e, 0xcd, 0x5c,
-0x67, 0xdc, 0x9e, 0xfb, 0x31, 0x86, 0x6b, 0xa7,
-0x9e, 0xe0, 0xbd, 0x4a, 0xc8, 0x7f, 0xfe, 0x5f,
-0xb7, 0x5c, 0x08, 0x32, 0xd1, 0xbe, 0xfc, 0xdf,
-0xb2, 0x9b, 0xfe, 0xf7, 0xee, 0xcb, 0xce, 0x56,
-0x3b, 0x76, 0x83, 0xfe, 0x24, 0x23, 0xeb, 0xfb,
-0xfc, 0x89, 0x6f, 0xfa, 0xb1, 0xfb, 0x32, 0xc1,
-0x1d, 0xf6, 0xe8, 0xf6, 0x7f, 0x9c, 0x70, 0xf3,
-0x5d, 0x15, 0x86, 0x2e, 0x97, 0x31, 0xf9, 0x30,
-0xeb, 0x72, 0x0f, 0xce, 0xfc, 0xae, 0xff, 0xbe,
-0x7d, 0x59, 0xff, 0xb8, 0x5d, 0x8f, 0x4e, 0xdc,
-0x45, 0xc6, 0xdf, 0x3f, 0x0a, 0xdb, 0x97, 0xc9,
-0xb8, 0x3d, 0x97, 0xb7, 0xb0, 0x9b, 0x64, 0x7c,
-0x97, 0xc1, 0xbb, 0xfe, 0x1b, 0xf6, 0xe5, 0x8c,
-0xf1, 0x5f, 0xdb, 0x97, 0x33, 0xc6, 0x7f, 0xf3,
-0xfd, 0x4c, 0x32, 0x01, 0x91, 0x3f, 0xf1, 0xc3,
-0xf3, 0xe7, 0xff, 0xbb, 0x3e, 0x75, 0x75, 0xff,
-0xc5, 0x0b, 0xf8, 0x7c, 0xff, 0x2d, 0xdf, 0xe3,
-0xff, 0xbb, 0x9f, 0xff, 0xaf, 0xed, 0x3b, 0x9f,
-0x5e, 0xe7, 0x8f, 0x5f, 0xe7, 0xbf, 0xe7, 0x13,
-0x22, 0xba, 0x20, 0xb2, 0xff, 0x37, 0x6d, 0xf8,
-0x3f, 0x70, 0xf9, 0x4f, 0x3f, 0x9f, 0x7e, 0x3e,
-0xfd, 0x7c, 0xfa, 0xf9, 0xf4, 0xf3, 0xe9, 0xe7,
-0xd3, 0xcf, 0xa7, 0x9f, 0x4f, 0x3f, 0x9f, 0x7e,
-0x3e, 0xfd, 0x7c, 0xfa, 0xf9, 0xf4, 0xf3, 0xe9,
-0xe7, 0xd3, 0xcf, 0xa7, 0x9f, 0x4f, 0x3f, 0xff,
-0x7f, 0xf8, 0x61, 0x67, 0x4a, 0x22, 0x3b, 0x53,
-0xa2, 0xff, 0xbf, 0xfe, 0x2e, 0x9f, 0x7e, 0x3e,
-0xfd, 0x7c, 0xfa, 0xf9, 0xf4, 0xf3, 0xe9, 0xe7,
-0xd3, 0xcf, 0xa7, 0x9f, 0x4f, 0x3f, 0x9f, 0x7e,
-0x3e, 0xfd, 0x7c, 0xfa, 0xf9, 0xf4, 0xf3, 0xe9,
-0xe7, 0xd3, 0xcf, 0xa7, 0x9f, 0x4f, 0x3f, 0x9f,
-0x7e, 0xfe, 0xcf, 0x7e, 0x42, 0x04, 0x53, 0x21,
-0x3d, 0x7f, 0x15, 0x22, 0x14, 0x0b, 0x2c, 0xa4,
-0x10, 0x31, 0x8a, 0xfe, 0xfb, 0xae, 0xcd, 0xae,
-0x99, 0x13, 0x22, 0x49, 0x21, 0xf3, 0x6f, 0xcd,
-0xbe, 0x3c, 0x76, 0xdc, 0xff, 0x03, 0xe6, 0xeb,
-0xaf, 0xb2, 0x8c, 0x8c, 0x02, 0x00,
diff --git a/board/esd/tasreg/tasreg.c b/board/esd/tasreg/tasreg.c
deleted file mode 100644
index 09a90ed..0000000
--- a/board/esd/tasreg/tasreg.c
+++ /dev/null
@@ -1,432 +0,0 @@
-/*
- * (C) Copyright 2004
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/m5249.h>
-#include <asm/io.h>
-
-
-/* Prototypes */
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
-
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-/* predefine these here for FPGA programming (before including fpga.c) */
-#define SET_FPGA(data)  mbar2_writeLong(MCFSIM_GPIO1_OUT, data)
-#define FPGA_DONE_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_DONE)
-#define FPGA_INIT_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_INIT)
-#define FPGA_PROG_ACTIVE_HIGH          /* on this platform is PROG active high!   */
-#define out32(a,b)                     /* nothing to do (gpio already configured) */
-
-
-/* fpga configuration data - generated by bin2cc */
-const unsigned char fpgadata[] =
-{
-#include "fpgadata.c"
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include "../common/fpga.c"
-
-
-int checkboard (void) {
-	ulong val;
-	uchar val8;
-
-	puts ("Board: ");
-	puts("esd TASREG");
-	val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf;
-	printf(" (Switch=%1X)\n", val8);
-
-	/*
-	 * Set LED on
-	 */
-	val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CONFIG_SYS_GPIO1_LED;
-	mbar2_writeLong(MCFSIM_GPIO1_OUT, val);   /* Set LED on */
-
-	return 0;
-};
-
-
-phys_size_t initdram (int board_type) {
-	unsigned long	junk = 0xa5a59696;
-
-	/*
-	 *  Note:
-	 *	RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
-	 */
-
-#ifdef CONFIG_SYS_FAST_CLK
-	/*
-	 * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
-	 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
-	 */
-	mbar_writeShort(MCFSIM_DCR, 0x8239);
-#elif CONFIG_SYS_PLL_BYPASS
-	/*
-	 * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
-	 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
-	 */
-	mbar_writeShort(MCFSIM_DCR, 0x8202);
-#else
-	/*
-	 * Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K)
-	 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles)
-	 */
-	mbar_writeShort(MCFSIM_DCR, 0x8222);
-#endif
-
-	/*
-	 * SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port),
-	 * PM=1 (continuous page mode)
-	 */
-
-	/* RE=0 (keep auto-refresh disabled while setting up registers) */
-	mbar_writeLong(MCFSIM_DACR0, 0x00003324);
-
-	/* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */
-	mbar_writeLong(MCFSIM_DMR0, 0x01fc0001);
-
-	/** Precharge sequence **/
-	mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */
-	out_be32((void *)0, junk); /* write to a memory location to init. precharge */
-	udelay(0x10); /* Allow several Precharge cycles */
-
-	/** Refresh Sequence **/
-	mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */
-	udelay(0x7d0); /* Allow gobs of refresh cycles */
-
-	/** Mode Register initialization **/
-	mbar_writeLong(MCFSIM_DACR0, 0x0000b364);  /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
-	out_be32((void *)0x800, junk); /* Access RAM to initialize the mode register */
-
-	return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
-};
-
-
-int testdram (void) {
-	/* TODO: XXX XXX XXX */
-	printf ("DRAM test not implemented!\n");
-
-	return (0);
-}
-
-
-int misc_init_r (void)
-{
-	unsigned char *dst;
-	ulong len = sizeof(fpgadata);
-	int status;
-	int index;
-	int i;
-	uchar buf[8];
-
-	dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
-	if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
-		printf ("GUNZIP ERROR - must RESET board to recover\n");
-		do_reset (NULL, 0, 0, NULL);
-	}
-
-	status = fpga_boot(dst, len);
-	if (status != 0) {
-		printf("\nFPGA: Booting failed ");
-		switch (status) {
-		case ERROR_FPGA_PRG_INIT_LOW:
-			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
-			break;
-		case ERROR_FPGA_PRG_INIT_HIGH:
-			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
-			break;
-		case ERROR_FPGA_PRG_DONE:
-			printf("(Timeout: DONE not high after programming FPGA)\n ");
-			break;
-		}
-
-		/* display infos on fpgaimage */
-		index = 15;
-		for (i=0; i<4; i++) {
-			len = dst[index];
-			printf("FPGA: %s\n", &(dst[index+1]));
-			index += len+3;
-		}
-		putc ('\n');
-		/* delayed reboot */
-		for (i=20; i>0; i--) {
-			printf("Rebooting in %2d seconds \r",i);
-			for (index=0;index<1000;index++)
-				udelay(1000);
-		}
-		putc ('\n');
-		do_reset(NULL, 0, 0, NULL);
-	}
-
-	puts("FPGA:  ");
-
-	/* display infos on fpgaimage */
-	index = 15;
-	for (i=0; i<4; i++) {
-		len = dst[index];
-		printf("%s ", &(dst[index+1]));
-		index += len+3;
-	}
-	putc ('\n');
-
-	free(dst);
-
-	/*
-	 *
-	 */
-	buf[0] = 0x00;
-	buf[1] = 0x32;
-	buf[2] = 0x3f;
-	i2c_write(0x38, 0, 0, buf, 3);
-
-	return (0);
-}
-
-
-#if 1 /* test-only: board specific test commands */
-int i2c_probe(uchar addr);
-
-/*
- */
-int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	ulong addr;
-
-	if (argc < 2) {
-		puts("ERROR!\n");
-		return -1;
-	}
-
-	addr = simple_strtol (argv[1], NULL, 16);
-
-	printf("i2c probe looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
-
-	for (;;) {
-		i2c_probe(addr);
-
-		/* Abort if ctrl-c was pressed */
-		if (ctrlc()) {
-			puts("\nAbort\n");
-			return 0;
-		}
-
-		udelay(1000);
-	}
-
-	return 0;
-}
-U_BOOT_CMD(
-	iploop,	2,	1,	do_iploop,
-	"i2c probe loop <addr>",
-	""
-);
-
-/*
- */
-int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	uchar buf[8];
-
-	out_be16((void *)0xe0000000, 0x4000);
-
-	udelay(5000); /* wait for 5ms */
-
-	buf[0] = 0x10;
-	buf[1] = 0x07;
-	buf[2] = 0x03;
-	i2c_write(0x10, 0, 0, buf, 3);
-
-	buf[0] = 0x10;
-	buf[1] = 0x01;
-	buf[2] = 0x80;
-	i2c_write(0x10, 0, 0, buf, 3);
-
-	buf[0] = 0x10;
-	buf[1] = 0x02;
-	buf[2] = 0x03;
-	i2c_write(0x10, 0, 0, buf, 3);
-
-	buf[0] = 0x10;
-	buf[1] = 0x03;
-	buf[2] = 0x29;
-	i2c_write(0x10, 0, 0, buf, 3);
-
-	buf[0] = 0x10;
-	buf[1] = 0x04;
-	buf[2] = 0x00;
-	i2c_write(0x10, 0, 0, buf, 3);
-
-	buf[0] = 0x10;
-	buf[1] = 0x05;
-	buf[2] = 0x00;
-	i2c_write(0x10, 0, 0, buf, 3);
-
-	buf[0] = 0x10;
-	buf[1] = 0x07;
-	buf[2] = 0x02;
-	i2c_write(0x10, 0, 0, buf, 3);
-
-	return 0;
-}
-U_BOOT_CMD(
-	codec,	1,	1,	do_codec,
-	"Enable codec",
-	""
-);
-
-/*
- */
-int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	ulong addr;
-	ulong instr;
-	ulong cntrl;
-	ulong data;
-	uchar buf[8];
-
-	if (argc < 5) {
-		puts("ERROR!\n");
-		return -1;
-	}
-
-	addr = simple_strtol (argv[1], NULL, 16);
-	instr = simple_strtol (argv[2], NULL, 16);
-	cntrl = simple_strtol (argv[3], NULL, 16);
-	data = simple_strtol (argv[4], NULL, 16);
-
-	buf[0] = (uchar)instr;
-	buf[1] = (uchar)cntrl;
-	buf[2] = (uchar)data;
-	i2c_write(addr, 0, 0, buf, 3);
-
-	return 0;
-}
-U_BOOT_CMD(
-	saa,	5,	1,	do_saa,
-	"Write to SAA1064 <addr> <instr> <cntrl> <data>",
-	""
-);
-
-/*
- */
-int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	ulong addr;
-	ulong data0;
-	ulong data1;
-	ulong data2;
-	ulong data3;
-	uchar buf[8];
-	int cnt;
-
-	if (argc < 3) {
-		puts("ERROR!\n");
-		return -1;
-	}
-
-	addr = simple_strtol (argv[1], NULL, 16);
-	cnt = simple_strtol (argv[2], NULL, 16);
-	data0 = simple_strtol (argv[3], NULL, 16);
-	data1 = simple_strtol (argv[4], NULL, 16);
-	data2 = simple_strtol (argv[5], NULL, 16);
-	data3 = simple_strtol (argv[6], NULL, 16);
-
-	printf("Writing %d bytes to device %lx!\n", cnt, addr);
-	buf[0] = (uchar)data0;
-	buf[1] = (uchar)data1;
-	buf[2] = (uchar)data2;
-	buf[3] = (uchar)data3;
-	i2c_write(addr, 0, 0, buf, cnt);
-
-	return 0;
-}
-U_BOOT_CMD(
-	iwrite,	6,	1,	do_iwrite,
-	"Write n bytes to I2C-device",
-	"addr cnt data0 ... datan"
-);
-
-/*
- */
-int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	ulong addr;
-	ulong cnt;
-	uchar buf[32];
-	int i;
-
-	if (argc < 3) {
-		puts("ERROR!\n");
-		return -1;
-	}
-
-	addr = simple_strtol (argv[1], NULL, 16);
-	cnt = simple_strtol (argv[2], NULL, 16);
-
-	i2c_read(addr, 0, 0, buf, cnt);
-	printf("I2C Data:");
-	for (i=0; i<cnt; i++) {
-		printf(" %02X", buf[i]);
-	}
-	printf("\n");
-
-	return 0;
-}
-U_BOOT_CMD(
-	iread,	3,	1,	do_iread,
-	"Read from I2C <addr> <cnt>",
-	""
-);
-
-/*
- */
-int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	ulong addr;
-	uchar buf[32];
-	int cnt;
-
-	if (argc < 2) {
-		puts("ERROR!\n");
-		return -1;
-	}
-
-	addr = simple_strtol (argv[1], NULL, 16);
-	cnt = 1;
-
-	printf("iread looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
-
-	for (;;) {
-		i2c_read(addr, 0, 0, buf, cnt);
-
-		/* Abort if ctrl-c was pressed */
-		if (ctrlc()) {
-			puts("\nAbort\n");
-			return 0;
-		}
-
-		udelay(3000);
-	}
-
-	return 0;
-}
-U_BOOT_CMD(
-	ireadl,	2,	1,	do_ireadl,
-	"Read-loop from I2C <addr>",
-	""
-);
-#endif
diff --git a/board/esd/tasreg/u-boot.lds b/board/esd/tasreg/u-boot.lds
deleted file mode 100644
index 7f9e41c..0000000
--- a/board/esd/tasreg/u-boot.lds
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(m68k)
-
-SECTIONS
-{
-  .text      :
-  {
-    arch/m68k/cpu/mcf52x2/start.o	(.text*)
-
-    *(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-
-  .reloc   :
-  {
-    __got_start = .;
-    KEEP(*(.got))
-    __got_end = .;
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-
-  . = ALIGN(4);
-  .u_boot_list : {
-		KEEP(*(SORT(.u_boot_list*)));
-  }
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)      :
-  {
-   _sbss = .;
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-   _ebss = .;
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/configs/TASREG_defconfig b/configs/TASREG_defconfig
deleted file mode 100644
index 2bb0421..0000000
--- a/configs/TASREG_defconfig
+++ /dev/null
@@ -1,2 +0,0 @@
-CONFIG_M68K=y
-CONFIG_TARGET_TASREG=y
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 5d2875c..46fefcd 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order.
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+TASREG           m68k        mcf52x2        -           -           Matthias Fuchs <matthias.fuchs at esd.eu>
 A3000            powerpc     mpc824x        -           -
 CPC45            powerpc     mpc824x        -           -           Josef Wagner <Wagner at Microsys.de>
 CU824            powerpc     mpc824x        -           -           Wolfgang Denk <wd at denx.de>
diff --git a/include/configs/TASREG.h b/include/configs/TASREG.h
deleted file mode 100644
index 5ad9383..0000000
--- a/include/configs/TASREG.h
+++ /dev/null
@@ -1,287 +0,0 @@
-/*
- * Configuation settings for the esd TASREG board.
- *
- * (C) Copyright 2004
- * Stefan Roese, esd gmbh germany, stefan.roese at esd-electronics.com
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef _TASREG_H
-#define _TASREG_H
-
-#ifndef __ASSEMBLY__
-#include <asm/m5249.h>
-#endif
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_MCF52x2			/* define processor family */
-#define CONFIG_M5249			/* define processor type */
-
-#define CONFIG_MISC_INIT_R      1       /* call misc_init_r()           */
-
-#define CONFIG_MCFTMR
-
-#define CONFIG_MCFUART
-#define CONFIG_SYS_UART_PORT		(0)
-#define CONFIG_BAUDRATE		19200
-
-#undef  CONFIG_WATCHDOG
-
-#undef CONFIG_MONITOR_IS_IN_RAM	              /* no pre-loader required!!! ;-) */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_BSP
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_I2C
-
-#undef CONFIG_CMD_NET
-
-
-#define CONFIG_BOOTDELAY	3
-
-#define CONFIG_SYS_LONGHELP				/* undef to save memory		*/
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024		/* Console I/O Buffer Size	*/
-#else
-#define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_DEVICE_NULLDEV	1	/* include nulldev device	*/
-#define CONFIG_SYS_CONSOLE_INFO_QUIET	1	/* don't print console @ startup*/
-#define CONFIG_AUTO_COMPLETE	1       /* add autocompletion support   */
-#define CONFIG_LOOPW            1       /* enable loopw command         */
-#define CONFIG_MX_CYCLIC        1       /* enable mdc/mwc commands      */
-
-#define CONFIG_SYS_LOAD_ADDR	        0x200000	/* default load address */
-
-#define CONFIG_SYS_MEMTEST_START	0x400
-#define CONFIG_SYS_MEMTEST_END		0x380000
-
-/*
- * Clock configuration: enable only one of the following options
- */
-
-#if 0 /* this setting will run the cpu at 11MHz */
-#define CONFIG_SYS_PLL_BYPASS          1                /* bypass PLL for test purpose */
-#undef  CONFIG_SYS_FAST_CLK                             /* MCF5249 can run at 140MHz   */
-#define CONFIG_SYS_CLK		        11289600         /* PLL bypass                  */
-#endif
-
-#if 0 /* this setting will run the cpu at 70MHz */
-#undef  CONFIG_SYS_PLL_BYPASS                           /* bypass PLL for test purpose */
-#undef  CONFIG_SYS_FAST_CLK                             /* MCF5249 can run at 140MHz   */
-#define CONFIG_SYS_CLK		        72185018         /* The next lower speed        */
-#endif
-
-#if 1 /* this setting will run the cpu at 140MHz */
-#undef  CONFIG_SYS_PLL_BYPASS                           /* bypass PLL for test purpose */
-#define CONFIG_SYS_FAST_CLK            1                /* MCF5249 can run at 140MHz   */
-#define	CONFIG_SYS_CLK		        132025600        /* MCF5249 can run at 140MHz   */
-#endif
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-
-#define CONFIG_SYS_MBAR		0x10000000	/* Register Base Addrs */
-#define	CONFIG_SYS_MBAR2	        0x80000000
-
-/*-----------------------------------------------------------------------
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
-#define CONFIG_SYS_I2C_SOFT_SPEED	100000
-#define CONFIG_SYS_I2C_SOFT_SLAVE	0x7F
-
-#if 0 /* push-pull */
-#define	SDA	        0x00800000
-#define	SCL	        0x00000008
-#define DIR0            *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO_EN))
-#define DIR1            *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO1_EN))
-#define OUT0	        *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO_OUT))
-#define OUT1	        *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO1_OUT))
-#define IN0	        *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO_READ))
-#define IN1	        *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO1_READ))
-#define	I2C_INIT	{OUT1|=SDA;OUT0|=SCL;}
-#define	I2C_READ	((IN1&SDA)?1:0)
-#define	I2C_SDA(x)	{if(x)OUT1|=SDA;else OUT1&=~SDA;}
-#define	I2C_SCL(x)	{if(x)OUT0|=SCL;else OUT0&=~SCL;}
-#define	I2C_DELAY	{udelay(5);}
-#define	I2C_ACTIVE	{DIR1|=SDA;}
-#define	I2C_TRISTATE    {DIR1&=~SDA;}
-#else /* open-collector */
-#define	SDA	        0x00800000
-#define	SCL	        0x00000008
-#define DIR0            *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO_EN))
-#define DIR1            *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO1_EN))
-#define OUT0	        *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO_OUT))
-#define OUT1	        *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO1_OUT))
-#define IN0	        *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO_READ))
-#define IN1	        *((volatile ulong*)(CONFIG_SYS_MBAR2+MCFSIM_GPIO1_READ))
-#define	I2C_INIT	{DIR1&=~SDA;DIR0&=~SCL;OUT1&=~SDA;OUT0&=~SCL;}
-#define	I2C_READ	((IN1&SDA)?1:0)
-#define	I2C_SDA(x)	{if(x)DIR1&=~SDA;else DIR1|=SDA;}
-#define	I2C_SCL(x)	{if(x)DIR0&=~SCL;else DIR0|=SCL;}
-#define	I2C_DELAY	{udelay(5);}
-#define	I2C_ACTIVE	{DIR1|=SDA;}
-#define	I2C_TRISTATE    {DIR1&=~SDA;}
-#endif
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* EEPROM CAT28WC32	*/
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2	/* Bytes of address	*/
-/* mask of address bits that overflow into the "EEPROM chip address"	*/
-#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x01
-/*
- * The Catalyst CAT24WC32 has 32 byte page write mode using
- * last 5 bits of the address
- */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
-#define CONFIG_SYS_INIT_RAM_SIZE	0x1000	/* Size of used area in internal SRAM	*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_ADDR		0xFFC40000	/* Address of Environment Sector*/
-#define CONFIG_ENV_SIZE		0x10000	/* Total Size of Environment Sector	*/
-#define CONFIG_ENV_SECT_SIZE	0x10000 /* see README - env sector total size	*/
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_SDRAM_SIZE		16		/* SDRAM size in MB */
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_CS0_BASE
-
-#if 0 /* test-only */
-#define CONFIG_PRAM             512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */
-#endif
-
-#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
-
-#define CONFIG_SYS_MONITOR_LEN		0x20000
-#define CONFIG_SYS_MALLOC_LEN		(1 * 1024*1024)	/* Reserve 1 MB for malloc()	*/
-#define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization ??
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
-
-#define CONFIG_SYS_FLASH_WORD_SIZE	unsigned short	/* flash word size (width)	*/
-#define CONFIG_SYS_FLASH_ADDR0		0x5555	/* 1st address for flash config cycles	*/
-#define CONFIG_SYS_FLASH_ADDR1		0x2AAA	/* 2nd address for flash config cycles	*/
-/*
- * The following defines are added for buggy IOP480 byte interface.
- * All other boards should use the standard values (CPCI405 etc.)
- */
-#define CONFIG_SYS_FLASH_READ0		0x0000	/* 0 is standard			*/
-#define CONFIG_SYS_FLASH_READ1		0x0001	/* 1 is standard			*/
-#define CONFIG_SYS_FLASH_READ2		0x0002	/* 2 is standard			*/
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO		/* print 'E' for empty sector on flinfo */
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	16
-
-#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
-					 CONFIG_SYS_INIT_RAM_SIZE - 8)
-#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
-					 CONFIG_SYS_INIT_RAM_SIZE - 4)
-#define CONFIG_SYS_ICACHE_INV		(CF_CACR_DCM)
-#define CONFIG_SYS_CACHE_ACR1		(CONFIG_SYS_SDRAM_BASE | \
-					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
-					 CF_ACR_EN | CF_ACR_SM_ALL)
-#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CEIB | \
-					 CF_CACR_DBWE)
-
-/*-----------------------------------------------------------------------
- * Memory bank definitions
- */
-
-/* CS0 - AMD Flash, address 0xffc00000 */
-#define	CONFIG_SYS_CS0_BASE		0xffc00000
-#define	CONFIG_SYS_CS0_CTRL		0x00001980	/* WS=0110, AA=1, PS=10         */
-/** Note: There is a CSMR0/DRAM vector problem, need to disable C/I ***/
-#define	CONFIG_SYS_CS0_MASK		0x003f0021	/* 4MB, AA=0, WP=0, C/I=1, V=1  */
-
-/* CS1 - FPGA, address 0xe0000000 */
-#define	CONFIG_SYS_CS1_BASE		0xe0000000
-#define	CONFIG_SYS_CS1_CTRL		0x00000d80	/* WS=0011, AA=1, PS=10         */
-#define	CONFIG_SYS_CS1_MASK		0x00010001	/* 128kB, AA=0, WP=0, C/I=0, V=1*/
-
-/*-----------------------------------------------------------------------
- * Port configuration
- */
-#define	CONFIG_SYS_GPIO_FUNC           0x00000008      /* Set gpio pins: none          */
-#define	CONFIG_SYS_GPIO1_FUNC          0x00df00f0      /* 36-39(SWITCH),48-52(FPGAs),54*/
-#define	CONFIG_SYS_GPIO_EN             0x00000008      /* Set gpio output enable       */
-#define	CONFIG_SYS_GPIO1_EN            0x00c70000      /* Set gpio output enable       */
-#define	CONFIG_SYS_GPIO_OUT            0x00000008      /* Set outputs to default state */
-#define	CONFIG_SYS_GPIO1_OUT           0x00c70000      /* Set outputs to default state */
-
-#define CONFIG_SYS_GPIO1_LED           0x00400000      /* user led                     */
-
-/*-----------------------------------------------------------------------
- * FPGA stuff
- */
-#define CONFIG_SYS_FPGA_SPARTAN2	1	    /* using Xilinx Spartan 2 now    */
-#define CONFIG_SYS_FPGA_MAX_SIZE	512*1024    /* 512kByte is enough for XC2S200*/
-
-/* FPGA program pin configuration */
-#define CONFIG_SYS_FPGA_PRG		0x00010000  /* FPGA program pin (ppc output) */
-#define CONFIG_SYS_FPGA_CLK		0x00040000  /* FPGA clk pin (ppc output)     */
-#define CONFIG_SYS_FPGA_DATA		0x00020000  /* FPGA data pin (ppc output)    */
-#define CONFIG_SYS_FPGA_INIT		0x00080000  /* FPGA init pin (ppc input)     */
-#define CONFIG_SYS_FPGA_DONE		0x00100000  /* FPGA done pin (ppc input)     */
-
-#endif	/* _TASREG_H */
-- 
1.7.9.5



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