[U-Boot] Please pull u-boot-x86.git
Simon Glass
sjg at chromium.org
Tue Jan 13 02:06:19 CET 2015
Hi Tom,
The following changes since commit 92fa7f53f1f3f03296f8ffb14bdf1baefab83368:
Prepare v2015.01 (2015-01-12 09:39:08 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git
for you to fetch changes up to c479f96c0e0ceb226a8fb83a7996b78bfdcfd7b2:
x86: Remove CONFIG_DISPLAY_CPUINFO in chromebook_link.h (2015-01-12
17:03:47 -0800)
----------------------------------------------------------------
Bin Meng (25):
x86: Remove alex.dts in arch/x86/dts
x86: Rename coreboot.dsti to serial.dtsi
x86: Clean up the board dts files
x86: Add missing DECLARE_GLOBAL_DATA_PTR for pci.c
x86: Support pci bus scan in the early phase
pci: Make pci apis usable before relocation
x86: Simplify the fsp hob access functions
fdt: Add several apis to decode pci device node
serial: ns16550: Support ns16550 compatible pci uart devices
x86: Use ePAPR defined properties for x86-uart
x86: crownbay: Add pci devices in the dts file
x86: fsp: Drop get_hob_type() and get_hob_length()
x86: coreboot: Set up timer base correctly
x86: Allow a hardcoded TSC frequency provided by Kconfig
x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
x86: Hide ROM chip size when CONFIG_X86_RESET_VECTOR is not selected
x86: coreboot: Make SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE configurable
x86: coreboot: Move coreboot-specific defines from coreboot.h to Kconfig
x86: Move CONFIG_SYS_CAR_xxx to Kconfig
x86: Remove include/configs/coreboot.h
x86: Make chromebook_link the default board for coreboot
x86: coreboot: Wrap cros_ec initialization
x86: coreboot: Configure pci memory regions
x86: Update README.x86 for coreboot support
x86: Remove CONFIG_DISPLAY_CPUINFO in chromebook_link.h
Simon Glass (20):
x86: Correct XIP_ROM_SIZE
x86: Drop RAMTOP Kconfig
x86: Correct ifdtool microcode calculation
x86: video: Add a debug() to display the frame buffer address
x86: pci: Don't return a vesa mode when there is not video
x86: video: Add debug option to time the BIOS copy
x86: ivybridge: Only run the Video BIOS when video is enabled
x86: Use cache, don't clear the display in video BIOS
x86: Tidy up VESA mode numbers
x86: pci: Display vesa modes in hex
x86: ivybridge: Drop support for ROM caching
x86: Add support for MTRRs
x86: ivybridge: Set up an MTRR for the video frame buffer
x86: board_f: Adjust x86 boot order for performance
x86: ivybridge: Request MTRRs for DRAM regions
x86: Commit the current MTRRs before relocation
x86: ivybridge: Add a way to turn off the CAR
x86: Disable CAR before relocation on platforms that need it
x86: ivybridge: Update microcode early in boot
x86: Add an 'mtrr' command to list and adjust MTRRs
arch/x86/Kconfig | 39 +++++-
arch/x86/cpu/Makefile | 1 +
arch/x86/cpu/coreboot/Kconfig | 15 +++
arch/x86/cpu/coreboot/coreboot.c | 22 ++--
arch/x86/cpu/coreboot/pci.c | 30 ++++-
arch/x86/cpu/coreboot/timestamp.c | 33 ++++--
arch/x86/cpu/ivybridge/car.S | 74 +++++++++++-
arch/x86/cpu/ivybridge/cpu.c | 27 +----
arch/x86/cpu/ivybridge/gma.c | 16 ++-
arch/x86/cpu/ivybridge/microcode_intel.c | 26 ++--
arch/x86/cpu/ivybridge/sdram.c | 10 ++
arch/x86/cpu/mtrr.c | 81 +++++++++++++
arch/x86/cpu/pci.c | 11 +-
arch/x86/cpu/queensbay/fsp_support.c | 95 ++++++++-------
arch/x86/cpu/queensbay/tnc_dram.c | 39 +++---
arch/x86/cpu/start.S | 8 ++
arch/x86/dts/Makefile | 4 +-
arch/x86/dts/alex.dts | 24 ----
arch/x86/dts/chromebook_link.dts | 217
++++++++++++++++++++++++++++++++-
arch/x86/dts/coreboot.dtsi | 17 ---
arch/x86/dts/crownbay.dts | 94 +++++++++++++--
arch/x86/dts/link.dts | 224
-----------------------------------
arch/x86/dts/serial.dtsi | 9 ++
arch/x86/include/asm/arch-ivybridge/microcode.h | 6 +
arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h | 68 +++--------
arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h | 5 +-
arch/x86/include/asm/global_data.h | 16 ++-
arch/x86/include/asm/mtrr.h | 163
++++++++++++-------------
arch/x86/include/asm/pci.h | 2 +-
arch/x86/lib/Makefile | 1 +
arch/x86/lib/bios.c | 14 ++-
arch/x86/lib/cmd_hob.c | 18 +--
arch/x86/lib/cmd_mtrr.c | 138
+++++++++++++++++++++
arch/x86/lib/init_helpers.c | 8 ++
arch/x86/lib/tsc_timer.c | 8 +-
board/coreboot/coreboot/Kconfig | 27 ++++-
board/coreboot/coreboot/MAINTAINERS | 2 +-
board/coreboot/coreboot/coreboot.c | 2 +
board/google/chromebook_link/Kconfig | 9 ++
board/intel/crownbay/Kconfig | 1 +
common/board_f.c | 8 +-
configs/chromebook_link_defconfig | 1 +
configs/coreboot-x86_defconfig | 1 -
doc/README.x86 | 57 ++++++++-
drivers/pci/pci.c | 25 ++--
drivers/pci/pci_rom.c | 9 +-
drivers/serial/ns16550.c | 31 +++++
drivers/serial/serial_x86.c | 8 +-
drivers/video/Kconfig | 8 ++
drivers/video/x86_fb.c | 1 +
include/asm-generic/global_data.h | 6 +
include/configs/chromebook_link.h | 8 +-
include/configs/coreboot.h | 75 ------------
include/configs/crownbay.h | 2 -
include/fdtdec.h | 108 +++++++++++++++--
lib/fdtdec.c | 171
+++++++++++++++++++++++---
tools/ifdtool.c | 4 +-
57 files changed, 1413 insertions(+), 714 deletions(-)
create mode 100644 arch/x86/cpu/coreboot/Kconfig
create mode 100644 arch/x86/cpu/mtrr.c
delete mode 100644 arch/x86/dts/alex.dts
mode change 120000 => 100644 arch/x86/dts/chromebook_link.dts
delete mode 100644 arch/x86/dts/coreboot.dtsi
delete mode 100644 arch/x86/dts/link.dts
create mode 100644 arch/x86/dts/serial.dtsi
create mode 100644 arch/x86/lib/cmd_mtrr.c
delete mode 100644 include/configs/coreboot.h
Regards,
Simon
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