[U-Boot] [PATCH] sunxi: display: Make lcd display clk phase configurable

Hans de Goede hdegoede at redhat.com
Sun Jan 18 13:21:30 CET 2015


On 18-01-15 12:33, Siarhei Siamashka wrote:
> On Tue, 13 Jan 2015 13:33:32 +0100
> Hans de Goede <hdegoede at redhat.com> wrote:
>> While running some tests with an Olinuxino-A13-Micro + a 7" Olimex LCD module
>> I noticed that the screen flickered. This is caused by the lcd display clk
>> phase reg value being set to 0, where it should be 1 in this setup.
>> This commit adds a Kconfig option for the lcd display clk phase, so that we
>> can set it per board. This defaults to 1, because looking at all the fex
>> files in sunxi-boards, that is by far the most used value.
> What is the name of this option in fex files?

Good question on sun4i / sun5i / sun7i it is stored in lcd_io_cfg0
but as a raw register value, rather then the clk phase value,
so you need to shift right by 28 to get the actual value, e.g.:

lcd_io_cfg0 = 268435456

Means (0x10000000 >> 28) == 1

On sun6i / sun8i it is not clear, the allwinner kernel code uses
lcd_hv_clk_phase which gets converted to an actual register value in a
complicated method unfortunately, see the allwinner kernel sources.

Where as the fex files seem to use lcd_io_phase which is not used by
the kernel AFAICT ...

Looking at the register values used under android it just seems to end
up being 0 on sun6i / sun8i.



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