[U-Boot] [PATCH] ARM: UniPhier: fix IECTRL set code for PH1-Pro4

[Masahiro Yamada]

For PH1-Pro4, the bit 6 of the IECTRL must be set.  It is the only
available bit in this register.  There is no effect of the write
access to the other bits.

Signed-off-by: Masahiro Yamada <yamada.m at jp.panasonic.com>
---

 arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
index 2cc5df6..b7c4b10 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
@@ -23,6 +23,6 @@ void sg_init(void)
 
 	/* Input ports must be enabled before deasserting reset of cores */
 	tmp = readl(SG_IECTRL);
-	tmp |= 0x1;
+	tmp |= 1 << 6;
 	writel(tmp, SG_IECTRL);
 }
-- 
1.9.1