[U-Boot] [PATCH] arm: fix exception vectors

[Bill Pringlemeir]

> On Mon, 19 Jan 2015 11:11:34 +0100, Luca Ellero

>> As far as I can see the mechanism to relocate vectors is implemented 
>> only on iMX25/27 and involves high vectors address (0xFFFFxxxx).

On 19 Jan 2015, albert.u.boot at aribaud.net wrote:

> You are correct that the mechanism is /used/ only by mx25 and mx27.

> However, it has been introduced to support /all/ SoCs (or even
> boards), not only mx25, mx27, and /all/ exception vector handling
> scenarios, not only high vectors addresses.

> Actually, the standard high and low address is handled by default,
> and mx25 and mx27 are cases where this default is overriden /because/
> high or low vector addresses are *unapplicable* for them due to their
> memory mapping.

> On Mon, 19 Jan 2015 11:11:34 +0100, Luca Ellero

>> The problem is that, after relocation, U-Boot doesn't fix the vector
>> table addresses, they still point to the old addresses (before
>> relocation).  This is wrong and this patch fixes them to point to the
>> new addresses.

On 19 Jan 2015, albert.u.boot at aribaud.net wrote:

> You are right about the problem, and this problem is exactly what the
> relocate_vectors mechanism is here to fix -- exactly the same problem
> mx25 and mx27 had before we fixed it (quite recently actually, as it
> was done mid-November, between 2015.01-rc1 and 2015.01-rc1 rc2).

> On Mon, 19 Jan 2015 11:11:34 +0100, Luca Ellero

>> I had to use this patch trying to implement IRQ support for a
>> Freescale iMX6 board. iMX6 does not provide RAM at the high vectors
>> address and trying to access them leads to errors, so I couldn't use
>> them.

On 19 Jan 2015, albert.u.boot at aribaud.net wrote:

> This is *exactly* the case where you should define your own version of
> relocate_vectors (probably at SoC level). 

A key difference is the ARM CPU architecture version.  The ARMv7/Cortex
on the imx6 will support vector table 'remaps'.  Currently I see,

#ifdef CONFIG_HAS_VBAR
        /*
         * If the ARM processor has the security extensions,
         * use VBAR to relocate the exception vectors.
         */
        ldr     r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
        mcr     p15, 0, r0, c12, c0, 0  /* Set VBAR */
#else   

This should be available for the CPUs, but I don't see this symbol
besides a 'Kconfig'.  There are three versions on the Cortex, but the
VBAR (whether secure or not) is the the correct one.

At least in theory, this code if activated should work for the iMx6 and
an override of the 'weak' relocate vectors is not needed.  I think
trying to use the 'VBAR' is the correct way to go?

Fwiw,
Bill Pringlemeir.