[U-Boot] Odroid XU3 - exynos5422 - SPL - iRAM/sRAM address

Kevin Hilman khilman at kernel.org
Tue Jan 20 23:43:02 CET 2015


Suriyan Ramasami <suriyan.r at gmail.com> writes:

> Hello Kevin,
>    These are the changes that would be necessary in uboot mainline for SPL:
>
> arch/arm/cpu/armv7/exynos/Kconfig
> -       select OF_CONTROL
> +       select SUPPORT_SPL
> +       select OF_CONTROL if !SPL_BUILD
>
> configs/odroid-xu3_defconfig
> +CONFIG_SPL=y
>
> include/configs/odroid_xu3.h
> #undef CONFIG_SPL_TEXT_BASE
> #define CONFIG_SPL_TEXT_BASE           0x02027000
>
> #undef CONFIG_SEC_FW_SIZE
> #define CONFIG_SEC_FW_SIZE (15 << 10) /* 15 KB */

Thanks.  With those changes, a build gives me:

./include/common.h:355:73: fatal error: asm/u-boot-sandbox.h: No such file or directory

Sorry for the dumb questions, but I'm not very familiar with u-boot.
I'm more comofortable in the kernel.

>  FWICT, mainline uboot does not have code to handle secure firmware.
> For instance when secure firmware is present the address to poke a
> jump address for the CPU is different (nsram +1c etc). This stems from
> lowlevel_init.S being moved over to the NS area. This is also missing
> in uboot mainline or so I think.

Hmm, it seems the XU3 has secure firmware so I guess this wont' be useful
for me yet?

Curious what platforms you're testing this on?  And are any of them
using secure firmware?

Also, I'm still a bit unsure where the switch from secure to NS world
happens.  Is that in BL1? or somewhere in BL2?  If it's in BL2, have you
tried switching secure mode off?

> I hope this helps you out.

Well, it's certainly a step in the right direction, but not sure yet if
I can use it on the odroid-xu3 as I'm still trying to understand the
boot sequence.

Kevin

> The ddr init functions seem to be not correct for the 5422 (or so I
> think). I do not have access to any of the Samsung docs, hence, one
> solution was to copy over HKs ddr init function, and then the mainline
> SPL runs.
>
> Regards
> - Suriyan
>
>
> On Tue, Jan 20, 2015 at 1:30 PM, Kevin Hilman <khilman at kernel.org> wrote:
>> Hello Suriyan,
>>
>> Suriyan Ramasami <suriyan.r at gmail.com> writes:
>>
>>> Hello Sjoerd Simons,
>>>    A signed BL2 which allows unsigned BL2 chain load is already
>>> available for experimentation. Refer this link:
>>> http://forum.odroid.com/viewtopic.php?f=98&t=6147#p58984
>>> The suriyan.bl2-hkxu3.1212.5422.zip blob contains a signed BL2 which
>>> allows the same.
>>> The layout of SD card is as follows:
>>>
>>> BL1 (1 to 30) 15K
>>> BL2 (31 to 62) 16K
>>> indicator block (63 to 64) 1K
>>> uboot (65 to 2112) 1M
>>> tzsw (2113 to 2624) 256K
>>> unsigned BL2 (2625 to 2656) 16K
>>>
>>> A non zero in the first byte of the indicator block instructs the
>>> signed BL2 to load the unsigned BL2 @ offset 2625.
>>
>> I'm currently running mainline u-boot, and hoping to test the series
>> that powers down secondary cores on the odroid-xu3.  That series applies
>> and builds with mainline u-boot (v2015.01-rc3), but for it to work
>> correctly, IIUC, I'll also need to build an SPL from mainline.
>>
>> Can you share your changes to mainline u-boot that enable the building
>> of SPL?
>>
>> I'd like to try that using your BL2 that will load an unsigned BL2.
>>
>> Thanks,
>>
>> Kevin


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