[U-Boot] [PATCH] fdt: pci: Permit use of reg property for setting device address

[Bin Meng]

Hi Simon,

On Tue, Jan 20, 2015 at 10:31 PM, Simon Glass <sjg at chromium.org> wrote:
> +Thierry
>
> Hi Bin,
>
> On 20 January 2015 at 05:59, Bin Meng <bmeng.cn at gmail.com> wrote:
>> Hi Simon,
>>
>> On Tue, Jan 20, 2015 at 11:19 AM, Simon Glass <sjg at chromium.org> wrote:
>>> In commit a62e84d the old functionality of obtaining a PCI address from the
>>> 'reg' property was lost. Add it back, so we can support both a compatible
>>> string list and a 'reg' property.
>>>
>>> This patch fixes PCIe ethernet on Tegra boards.
>>>
>>> Signed-off-by: Simon Glass <sjg at chromium.org>
>>> ---
>>>
>>>  lib/fdtdec.c | 10 ++++++++--
>>>  1 file changed, 8 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
>>> index 89dac4c..0488607 100644
>>> --- a/lib/fdtdec.c
>>> +++ b/lib/fdtdec.c
>>> @@ -219,8 +219,14 @@ int fdtdec_get_pci_bdf(const void *blob, int node,
>>>
>>>         /* get vendor id & device id from the compatible string */
>>>         ret = fdtdec_get_pci_vendev(blob, node, &dt_vendor, &dt_device);
>>> -       if (ret)
>>> -               return ret;
>>> +       if (ret) {
>>> +               /* Fall back to using the 'reg' property */
>>> +               ret = fdtdec_get_int(blob, node, "reg", -1);
>>> +               if (ret == -1)
>>> +                       return -ENOENT;
>>> +               *bdf = ret & 0xffffff;
>>> +               return 0;
>>> +       }
>>>
>>>         /* extract the bdf from fdt_pci_addr */
>>>         *bdf = addr->phys_hi & 0xffff00;
>>> --
>>
>> How is 'reg' encodeded in Tegra's dts? I feel we should start using
>> standard bindings instead of custom one.
>
> This is as per the 'Numerical Representation' of the Physical Address
> Formats (in pci supplement v2.1). It seems just as valid as the
> textual ones.
>

I still don't get it. The 'Numerical Representation' of the Physical
Address Formats (in pci supplement v2.1) is already supported in
commit a62e84d. That's why I want to see how the Tegra's dts is
written and how commit a62e84d could not handle that case.

Regards,
Bin