[U-Boot] [PATCH] sunxi: Only compile board.o for CONFIG_SPL_BUILD

[Hans de Goede]

Hi,

On 20-01-15 22:40, Tom Rini wrote:
> All of the code in arch/arm/cpu/armv7/sunxi/board.c was under a check
> for CONFIG_SPL_BUILD so instead only build for SPL.

That is not true, the #ifdef SPL block ends at the end of board_init_f
as things currently stand in master, and even that is only the case
since the very recently merged "sunxi: Move SPL s_init() code to board_init_f()"
patch from Simon. Completely not building board.c would break the "reset"
command as well as break network booting.

Moreover I believe the changes by Simon are less then optimal.

> This lets us drop a hunk of code that was never enabled.

As for that hunk of code never being enabled, it was moved to a place
where it indeed no longer is ever enabled by the same commit from Simon,
before when it was sitting in s_init, would get called from both normal
u-boot execution and from SPL, and then it would run in the normal
u-boot call.

I realize that Simon's patches have posted quite a while back, and I
seem to have missed them, sorry about that. But I would have appreciated
a ping on this rather then merging them without any input from me.

This turns the cp15 mangling needed to get the caches going on sun6i
and later into a nop, meaning we will boot the kernel without any
caches enabling causing just the kernel extracting itself to take 5
seconds or so.

But that is not the biggest problem, the biggest problem is that on
sunxi the SPL and u-boot.bin are two separate pieces, where the second
may very will be used standalone, that is actually how we bring most
new SoC's up, first do a standalone u-boot.bin using Allwinner's
boot0 binary as SPL, and then later add SPL support. So we want
u-boot.bin to be able to work standalone, and thus it should not rely
on things like gpio setup already being done by whatever came before
it.

I'll look into fixing things up to work again properly with the recent
changes Simon made.

Regards,

Hans


>
> Cc: Hans de Goede <hdegoede at redhat.com>
> Cc: Ian Campbell <ijc at hellion.org.uk>
> Signed-off-by: Tom Rini <trini at ti.com>
> ---
>   arch/arm/cpu/armv7/sunxi/Makefile |    2 +-
>   arch/arm/cpu/armv7/sunxi/board.c  |   15 ---------------
>   2 files changed, 1 insertion(+), 16 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
> index 1720f7d..1fbfb6c 100644
> --- a/arch/arm/cpu/armv7/sunxi/Makefile
> +++ b/arch/arm/cpu/armv7/sunxi/Makefile
> @@ -8,7 +8,6 @@
>   # SPDX-License-Identifier:	GPL-2.0+
>   #
>   obj-y	+= timer.o
> -obj-y	+= board.o
>   obj-y	+= clock.o
>   obj-y	+= cpu_info.o
>   obj-y	+= pinmux.o
> @@ -30,6 +29,7 @@ endif
>   endif
>
>   ifdef CONFIG_SPL_BUILD
> +obj-y	+= board.o
>   obj-$(CONFIG_MACH_SUN4I)	+= dram_sun4i.o
>   obj-$(CONFIG_MACH_SUN5I)	+= dram_sun4i.o
>   obj-$(CONFIG_MACH_SUN6I)	+= dram_sun6i.o
> diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
> index f4a580a..5998548 100644
> --- a/arch/arm/cpu/armv7/sunxi/board.c
> +++ b/arch/arm/cpu/armv7/sunxi/board.c
> @@ -15,9 +15,7 @@
>   #include <netdev.h>
>   #include <miiphy.h>
>   #include <serial.h>
> -#ifdef CONFIG_SPL_BUILD
>   #include <spl.h>
> -#endif
>   #include <asm/gpio.h>
>   #include <asm/io.h>
>   #include <asm/arch/clock.h>
> @@ -27,10 +25,6 @@
>
>   #include <linux/compiler.h>
>
> -#ifdef CONFIG_SPL_BUILD
> -/* Pointer to the global data structure for SPL */
> -DECLARE_GLOBAL_DATA_PTR;
> -
>   /* The sunxi internal brom will try to loader external bootloader
>    * from mmc0, nand flash, mmc2.
>    * Unfortunately we can't check how SPL was loaded so assume
> @@ -92,14 +86,6 @@ void board_init_f(ulong dummy)
>   	 * access gets messed up (seems cache related) */
>   	setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800);
>   #endif
> -#if !defined CONFIG_SPL_BUILD && (defined CONFIG_MACH_SUN7I || \
> -		defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I)
> -	/* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */
> -	asm volatile(
> -		"mrc p15, 0, r0, c1, c0, 1\n"
> -		"orr r0, r0, #1 << 6\n"
> -		"mcr p15, 0, r0, c1, c0, 1\n");
> -#endif
>
>   	clock_init();
>   	timer_init();
> @@ -186,4 +172,3 @@ int cpu_eth_init(bd_t *bis)
>
>   	return 0;
>   }
> -#endif
>