[U-Boot] [PATCH v2 0/8] MIPS cache code cleanup

[Paul Burton]

This series cleans up the MIPS cache code somewhat, and unifies the
mips32 & mips64 implementations of it. This is largely in preparation
for further patches adding L2 cache support. The final patch of this
series fixes a bug encountered with recent cores on Malta boards.

Paul Burton (8):
  MIPS: avoid .set ISA for cache operations
  MIPS: unify cache maintenance functions
  MIPS: unify cache initialization code
  MIPS: refactor L1 cache config reads to a macro
  MIPS: refactor cache loops to a macro
  MIPS: inline mips_init_[id]cache functions
  MIPS: allow systems to skip loads during cache init
  MIPS: clear TagLo select 2 during cache init

 arch/mips/Kconfig                                  |   6 +
 arch/mips/cpu/mips32/Makefile                      |   3 +-
 arch/mips/cpu/mips32/cpu.c                         | 119 -----------
 arch/mips/cpu/mips64/Makefile                      |   2 +-
 arch/mips/cpu/mips64/cache.S                       | 213 --------------------
 arch/mips/cpu/mips64/cpu.c                         |  58 ------
 arch/mips/include/asm/cacheops.h                   |  13 ++
 arch/mips/lib/Makefile                             |   2 +
 arch/mips/lib/cache.c                              | 118 +++++++++++
 arch/mips/{cpu/mips32/cache.S => lib/cache_init.S} | 222 +++++++++------------
 10 files changed, 232 insertions(+), 524 deletions(-)
 delete mode 100644 arch/mips/cpu/mips64/cache.S
 create mode 100644 arch/mips/lib/cache.c
 rename arch/mips/{cpu/mips32/cache.S => lib/cache_init.S} (59%)

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2.2.2