[U-Boot] ARM: OMAP5: DRA7xx: Add support for power rail grouping

[Tom Rini]

On Fri, Dec 19, 2014 at 05:34:31PM +0200, Lubomir Popov wrote:

> On the DRA72x (J6Eco) EVM one PMIC SMPS is powering three SoC
> core rails. This concept of using one SMPS to supply multiple
> core domains (in various, although limited combinations, per
> primary device use case) has now become common and is used by
> many customer J6/J6Eco designs; it is supported by a number of
> corresponding PMIC OTP versions.
> 
> This patch implements correct operation of the core voltages
> scaling routine by ensuring that each SMPS that is supplying
> more than one domain shall be written only once, and with the
> highest voltage of those fused in the SoC (or of those defined
> in the corresponding header if fuse read is disabled or fails)
> for the power rails belonging to the group.
> 
> The patch also replaces some PMIC-related magic numbers with
> the appropriate definitions. The default OPP_NOM voltages for
> the DRA7xx SoCs are updated as well, per the latest DMs.
> 
> Signed-off-by: Lubomir Popov <l-popov at ti.com>

Applied to u-boot-ti/master, thanks!

-- 
Tom
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