[U-Boot] [PATCH 10/11] x86: crownbay: Enable graphics support
Simon Glass
sjg at chromium.org
Wed Jul 1 16:59:09 CEST 2015
Hi,
On 1 July 2015 at 02:28, Bin Meng <bmeng.cn at gmail.com> wrote:
> Enable graphics support on Intel Crown Bay board With the help of
> vgabios for Intel TunnelCreek IGD. Tested with an external LVDS
> panel connected to X4 connector and SDVO adapter connected to X9
> connector on the board.
>
> Signed-off-by: Jian Luo <jian.luo4 at boschrexroth.de>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> ---
>
> configs/crownbay_defconfig | 3 +++
> doc/README.x86 | 20 +++++++++++++-------
> include/configs/crownbay.h | 14 +++++++-------
> 3 files changed, 23 insertions(+), 14 deletions(-)
Nit below, otherwise:
Acked-by: Simon Glass <sjg at chromium.org>
>
> diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
> index e4edad0..de24bb6 100644
> --- a/configs/crownbay_defconfig
> +++ b/configs/crownbay_defconfig
> @@ -4,10 +4,13 @@ CONFIG_DEFAULT_DEVICE_TREE="crownbay"
> CONFIG_TARGET_CROWNBAY=y
> CONFIG_SMP=y
> CONFIG_MAX_CPUS=2
> +CONFIG_HAVE_VGA_BIOS=y
> CONFIG_GENERATE_PIRQ_TABLE=y
> CONFIG_GENERATE_MP_TABLE=y
> CONFIG_CMD_CPU=y
> CONFIG_CMD_NET=y
> CONFIG_OF_CONTROL=y
> CONFIG_CPU=y
> +CONFIG_VIDEO_VESA=y
> +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
> CONFIG_DM_RTC=y
> diff --git a/doc/README.x86 b/doc/README.x86
> index 7f3914f..646eff1 100644
> --- a/doc/README.x86
> +++ b/doc/README.x86
> @@ -113,6 +113,10 @@ binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP
> binary, change the following five bytes values from orginally E8 42 FF FF FF
> to B8 00 80 0B 00.
>
> +As for the video ROM, you need manually extract it from the Intel provided
nit: Intel-provided
> +BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM
> +ID 8086:4108, extract and save it as vga.bin in the board directory.
> +
> Now you can build U-Boot and obtain u-boot.rom
>
> $ make crownbay_defconfig
> @@ -254,7 +258,7 @@ If you want to check both consoles, use '-serial stdio'.
>
> CPU Microcode
> -------------
> -Modern CPUs usually require a special bit stream called microcode [6] to be
> +Modern CPUs usually require a special bit stream called microcode [8] to be
> loaded on the processor after power up in order to function properly. U-Boot
> has already integrated these as hex dumps in the source tree.
>
> @@ -265,9 +269,9 @@ Additional application processors (AP) can be brought up by U-Boot. In order to
> have an SMP kernel to discover all of the available processors, U-Boot needs to
> prepare configuration tables which contain the multi-CPUs information before
> loading the OS kernel. Currently U-Boot supports generating two types of tables
> -for SMP, called Simple Firmware Interface (SFI) [7] and Multi-Processor (MP) [8]
> -tables. The writing of these two tables are controlled by two Kconfig options
> -GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
> +for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP)
> +[10] tables. The writing of these two tables are controlled by two Kconfig
> +options GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
>
> Driver Model
> ------------
> @@ -372,6 +376,8 @@ References
> [3] http://www.coreboot.org/~stepan/pci8086,0166.rom
> [4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
> [5] http://www.intel.com/fsp
> -[6] http://en.wikipedia.org/wiki/Microcode
> -[7] http://simplefirmware.org
> -[8] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
> +[6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html
> +[7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/
> +[8] http://en.wikipedia.org/wiki/Microcode
> +[9] http://simplefirmware.org
> +[10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
> index 0e1f046..6cf53a3 100644
> --- a/include/configs/crownbay.h
> +++ b/include/configs/crownbay.h
> @@ -32,15 +32,16 @@
> #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
> #define CONFIG_PCI_IO_SIZE 0xe000
>
> +#define CONFIG_PCI_CONFIG_HOST_BRIDGE
> #define CONFIG_SYS_EARLY_PCI_INIT
> #define CONFIG_PCI_PNP
> #define CONFIG_E1000
>
> -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
> - "stdout=serial\0" \
> - "stderr=serial\0"
> +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga,usbkbd\0" \
> + "stdout=serial,vga\0" \
> + "stderr=serial,vga\0"
>
> -#define CONFIG_SCSI_DEV_LIST \
> +#define CONFIG_SCSI_DEV_LIST \
> {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
>
> #define CONFIG_SPI_FLASH_SST
> @@ -55,9 +56,8 @@
> #define CONFIG_PCH_GBE
> #define CONFIG_PHYLIB
>
> -/* Video is not supported */
> -#undef CONFIG_VIDEO
> -#undef CONFIG_CFB_CONSOLE
> +/* TunnelCreek IGD support */
> +#define CONFIG_VGA_AS_SINGLE_DEVICE
>
> /* Environment configuration */
> #define CONFIG_ENV_SECT_SIZE 0x1000
> --
> 1.8.2.1
>
Regards,
Simon
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