[U-Boot] [v3 10/10] spi: cadence_qspi: add device tree binding doc

[Jagan Teki]

On 2 July 2015 at 23:12, Vikas MANOCHA <vikas.manocha at st.com> wrote:
> Hi Jagan,
>
>> -----Original Message-----
>> From: Stefan Roese [mailto:sr at denx.de]
>> Sent: Thursday, July 02, 2015 3:12 AM
>> To: Vikas MANOCHA; Jagan Teki
>> Cc: u-boot at lists.denx.de
>> Subject: Re: [U-Boot] [v3 10/10] spi: cadence_qspi: add device tree binding
>> doc
>>
>> Hi Vikas,
>>
>> On 01.07.2015 00:57, Vikas MANOCHA wrote:
>> >>> +Cadence QSPI controller device tree bindings
>> >>> +--------------------------------------------
>> >>> +
>> >>> +Required properties:
>> >>> +- compatible           : should be "cadence,qspi".
>> >>> +- reg                  : 1.Physical base address and size of SPI registers map.
>> >>> +                         2. Physical base address & size of NOR Flash.
>> >>> +- clocks               : Clock phandles (see clock bindings for details).
>> >>> +- sram-size            : spi controller sram size.
>> >>
>> >> ? bus-num
>> >
>> > It is not being used in the cadence_qspi driver but used on socfpga
>> > arch to distinguish between different spi peripherals.
>> >
>> > Stefan,
>> > Can you please comment about it. It is ok to remove it from
>> > "arch/arm/dts/socfpga.dtsi"
>>
>> Not sure. Why do we need to remove it? I would prefer to keep it as its know
>> to work this way.
>>
>> BTW: We need to re-sync with the Linux Cadence QSPI NOR driver at some
>> time. At least in regard to the device-tree properties. The driver has been
>> posted for quite some time now. And I hope it will be accepted soon. And as
>> you can see from [1] the bindings / properties differ a bit from our currently
>> used ones. So once this driver is accepted in kernel.org, we need to re-sync
>> the bindings / dts files again.
>
> Jagan, do you agree not to remove it ?

Yes, but one think you can do is just add what ever nodes required on your dts
and document the same - don't touch dtsi.

thanks!
-- 
Jagan | openedev.