[U-Boot] [PATCH v3 7/8] dm: x86: baytrail: Correct PCI region 3 when driver model is used

[Simon Glass]

On 5 July 2015 at 21:22, Bin Meng <bmeng.cn at gmail.com> wrote:
> On Sat, Jul 4, 2015 at 8:28 AM, Simon Glass <sjg at chromium.org> wrote:
>> Commit afbbd413a fixed this for non-driver-model. Make sure that the driver
>> model code handles this also.
>>
>> Signed-off-by: Simon Glass <sjg at chromium.org>
>> ---
>>
>> Changes in v3:
>> - Drop the patch to board_f.c as it is not needed, and interferes with the fix
>> - Add a comment about why gd->pci_ram_top is being set
>>
>> Changes in v2:
>> - Only limit the PCI system memory region on x86 machines
>>
>>  arch/x86/cpu/cpu.c                | 2 ++
>>  drivers/pci/pci-uclass.c          | 8 ++++++--
>>  include/asm-generic/global_data.h | 1 +
>>  3 files changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
>> index d108ee5..2b6ed11 100644
>> --- a/arch/x86/cpu/cpu.c
>> +++ b/arch/x86/cpu/cpu.c
>> @@ -351,6 +351,8 @@ int x86_cpu_init_f(void)
>>
>>                 gd->arch.has_mtrr = has_mtrr();
>>         }
>> +       /* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */
>> +       gd->pci_ram_top = 0x80000000U;
>>
>>         return 0;
>>  }
>> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
>> index edec93f..5b91fe3 100644
>> --- a/drivers/pci/pci-uclass.c
>> +++ b/drivers/pci/pci-uclass.c
>> @@ -444,6 +444,7 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
>>  {
>>         int pci_addr_cells, addr_cells, size_cells;
>>         int cells_per_record;
>> +       phys_addr_t addr;
>>         const u32 *prop;
>>         int len;
>>         int i;
>> @@ -494,8 +495,11 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
>>         }
>>
>>         /* Add a region for our local memory */
>> -       pci_set_region(hose->regions + hose->region_count++, 0, 0,
>> -                      gd->ram_size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
>> +       addr = gd->ram_size;
>> +       if (gd->pci_ram_top && gd->pci_ram_top < addr)
>> +               addr = gd->pci_ram_top;
>> +       pci_set_region(hose->regions + hose->region_count++, 0, 0, addr,
>> +                      PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
>>
>>         return 0;
>>  }
>> diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
>> index 6747619..db0550b 100644
>> --- a/include/asm-generic/global_data.h
>> +++ b/include/asm-generic/global_data.h
>> @@ -93,6 +93,7 @@ typedef struct global_data {
>>  #endif
>>  #ifdef CONFIG_PCI
>>         struct pci_controller *hose;    /* PCI hose for early use */
>> +       phys_addr_t pci_ram_top;        /* top of region accessible to PCI */
>>  #endif
>>  #ifdef CONFIG_PCI_BOOTDELAY
>>         int pcidelay_done;
>> --
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>

Applied to u-boot-x86.