[U-Boot] [PATCH v2] x86: baytrail: Configure FSP UPD from device tree
Andrew Bradford
andrew at bradfordembedded.com
Wed Jul 8 13:30:48 CEST 2015
Hi Bin,
On 07/08 11:18, Bin Meng wrote:
> Hi Andrew,
>
> On Wed, Jul 8, 2015 at 3:16 AM, <andrew at bradfordembedded.com> wrote:
> > From: Andrew Bradford <andrew.bradford at kodakalaris.com>
> >
> > Allow for configuration of FSP UPD from the device tree which will
> > override any settings which the FSP was built with itself if the device
> > tree settings exist, otherwise simply trust the FSP's defaults.
> >
> > Modifies the MinnowMax board to transfer the FSP UPD hard-coded settings
> > to the MinnowMax dts.
> >
> > Signed-off-by: Andrew Bradford <andrew.bradford at kodakalaris.com>
> > ---
> >
> > Changes from v1:
> >
> > - Use "-" rather than "_" in dt property names.
> > - Use "Bay Trail" for the formal name of the Intel product family.
> > - Use an "fsp," prefix for dt property names for clarity.
> > - Fix minor code indentation issues.
> > - Create a dt subnode for the memory-down-params.
> > - Clarify documentation that dt overrides the FSP's config, so we don't
> > use booleans.
> >
> > arch/x86/cpu/baytrail/fsp_configs.c | 188 +++++++++++++++++----
> > arch/x86/dts/minnowmax.dts | 30 ++++
> > .../misc/intel,baytrail-fsp.txt | 119 +++++++++++++
> > include/fdtdec.h | 2 +
> > lib/fdtdec.c | 2 +
> > 5 files changed, 311 insertions(+), 30 deletions(-)
> > create mode 100644 doc/device-tree-bindings/misc/intel,baytrail-fsp.txt
> >
> > diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c
> > index 86b6926..fce76e6 100644
> > --- a/arch/x86/cpu/baytrail/fsp_configs.c
> > +++ b/arch/x86/cpu/baytrail/fsp_configs.c
> > @@ -1,14 +1,18 @@
> > /*
> > * Copyright (C) 2013, Intel Corporation
> > * Copyright (C) 2014, Bin Meng <bmeng.cn at gmail.com>
> > + * Copyright (C) 2015, Kodak Alaris, Inc
> > *
> > * SPDX-License-Identifier: Intel
> > */
> >
> > #include <common.h>
> > +#include <fdtdec.h>
> > #include <asm/arch/fsp/azalia.h>
> > #include <asm/fsp/fsp_support.h>
> >
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > /* ALC262 Verb Table - 10EC0262 */
> > static const uint32_t verb_table_data13[] = {
> > /* Pin Complex (NID 0x11) */
> > @@ -116,41 +120,165 @@ const struct pch_azalia_config azalia_config = {
> > .reset_wait_timer_us = 300
> > };
> >
> > +/**
> > + * Update the FSP's UPD. The FSP itself can be configured for defaults to
> > + * store in UPD through Intel's GUI configurator but likely a specific board
> > + * will want to update these from u-boot, so allow for that via device tree.
> > + * If the device tree does not specify a setting, trust the FSP's default.
> > + */
> > void update_fsp_upd(struct upd_region *fsp_upd)
> > {
> > struct memory_down_data *mem;
> > + const void *blob = gd->fdt_blob;
> > + int node;
> >
> > - /*
> > - * Configure everything here to avoid the poor hard-pressed user
> > - * needing to run Intel's binary configuration tool. It may also allow
> > - * us to support the 1GB single core variant easily.
> > - *
> > - * TODO(sjg at chromium.org): Move to device tree
> > - */
> > - fsp_upd->mrc_init_tseg_size = 8;
> > - fsp_upd->mrc_init_mmio_size = 0x800;
> > - fsp_upd->emmc_boot_mode = 0xff;
> > - fsp_upd->enable_sdio = 1;
> > - fsp_upd->enable_sdcard = 1;
> > - fsp_upd->enable_hsuart0 = 1;
> > fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config;
> > - fsp_upd->enable_i2_c0 = 0;
> > - fsp_upd->enable_i2_c2 = 0;
> > - fsp_upd->enable_i2_c3 = 0;
> > - fsp_upd->enable_i2_c4 = 0;
> > - fsp_upd->enable_xhci = 0;
> > - fsp_upd->igd_render_standby = 1;
> > +
> > + node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP);
> > + if (node < 0) {
> > + debug("%s: Cannot find FSP node\n", __func__);
> > + return;
> > + }
> > +
> > + fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node,
> > + "fsp,mrc-int-tseg-size",
>
> mrc-int? Guess it is mrc-init.
Yes, thank you for catching this. Will fix in v3.
> > + fsp_upd->mrc_init_tseg_size);
> > + fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node,
> > + "fsp,mrc-init-mmio-size",
> > + fsp_upd->mrc_init_mmio_size);
> > + fsp_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node,
> > + "fsp,mrc-init-spd-addr1",
> > + fsp_upd->mrc_init_spd_addr1);
> > + fsp_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node,
> > + "fsp,mrc-init-spd-addr2",
> > + fsp_upd->mrc_init_spd_addr2);
> > + fsp_upd->emmc_boot_mode = fdtdec_get_int(blob, node, "fsp,emmc-boot-mode",
> > + fsp_upd->emmc_boot_mode);
> > + fsp_upd->enable_sdio = fdtdec_get_int(blob, node, "fsp,enable-sdio",
> > + fsp_upd->enable_sdio);
>
> I think we agreed that all these 'enable' should be accessed using
> fdtdec_get_bool().
I was under the impression that we decided to keep these as non-bool so
that the FSP could be overridden as needed (or you can fully specify all
the properties in dt if you want) as per Simon's comments [1] along with
adding additional comments in this version of my patch to clarify this..
[1]:http://lists.denx.de/pipermail/u-boot/2015-June/217802.html
But I'm open to changing this to use bools. Additional thoughts on this
below...
> > + fsp_upd->enable_sdcard = fdtdec_get_int(blob, node, "fsp,enable-sdcard",
> > + fsp_upd->enable_sdcard);
> > + fsp_upd->enable_hsuart0 = fdtdec_get_int(blob, node, "fsp,enable-hsuart0",
> > + fsp_upd->enable_hsuart0);
> > + fsp_upd->enable_hsuart1 = fdtdec_get_int(blob, node, "fsp,enable-hsuart1",
> > + fsp_upd->enable_hsuart1);
> > + fsp_upd->enable_spi = fdtdec_get_int(blob, node, "fsp,enable-spi",
> > + fsp_upd->enable_spi);
> > + fsp_upd->enable_sata = fdtdec_get_int(blob, node, "fsp,enable-sata",
> > + fsp_upd->enable_sata);
> > + fsp_upd->enable_azalia = fdtdec_get_int(blob, node, "fsp,enable-azalia",
> > + fsp_upd->enable_azalia);
> > + fsp_upd->enable_xhci = fdtdec_get_int(blob, node, "fsp,enable-xhci",
> > + fsp_upd->enable_xhci);
> > + fsp_upd->enable_lpe = fdtdec_get_int(blob, node, "fsp,enable-lpe",
> > + fsp_upd->enable_lpe);
> > + fsp_upd->lpss_sio_enable_pci_mode = fdtdec_get_int(blob, node,
> > + "fsp,lpss-sio-enable-pci-mode",
> > + fsp_upd->lpss_sio_enable_pci_mode);
> > + fsp_upd->enable_dma0 = fdtdec_get_int(blob, node, "fsp,enable-dma0",
> > + fsp_upd->enable_dma0);
> > + fsp_upd->enable_dma1 = fdtdec_get_int(blob, node, "fsp,enable-dma1",
> > + fsp_upd->enable_dma1);
> > + fsp_upd->enable_i2_c0 = fdtdec_get_int(blob, node, "fsp,enable-i2-c0",
> > + fsp_upd->enable_i2_c0);
> > + fsp_upd->enable_i2_c1 = fdtdec_get_int(blob, node, "fsp,enable-i2-c1",
> > + fsp_upd->enable_i2_c1);
> > + fsp_upd->enable_i2_c2 = fdtdec_get_int(blob, node, "fsp,enable-i2-c2",
> > + fsp_upd->enable_i2_c2);
> > + fsp_upd->enable_i2_c3 = fdtdec_get_int(blob, node, "fsp,enable-i2-c3",
> > + fsp_upd->enable_i2_c3);
> > + fsp_upd->enable_i2_c4 = fdtdec_get_int(blob, node, "fsp,enable-i2-c4",
> > + fsp_upd->enable_i2_c4);
> > + fsp_upd->enable_i2_c5 = fdtdec_get_int(blob, node, "fsp,enable-i2-c5",
> > + fsp_upd->enable_i2_c5);
> > + fsp_upd->enable_i2_c6 = fdtdec_get_int(blob, node, "fsp,enable-i2-c6",
> > + fsp_upd->enable_i2_c6);
> > + fsp_upd->enable_pwm0 = fdtdec_get_int(blob, node, "fsp,enable-pwm0",
> > + fsp_upd->enable_pwm0);
> > + fsp_upd->enable_pwm1 = fdtdec_get_int(blob, node, "fsp,enable-pwm1",
> > + fsp_upd->enable_pwm1);
> > + fsp_upd->enable_hsi = fdtdec_get_int(blob, node, "fsp,enable-hsi",
> > + fsp_upd->enable_hsi);
> > + fsp_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node,
> > + "fsp,igd-dvmt50-pre-alloc",
> > + fsp_upd->igd_dvmt50_pre_alloc);
> > + fsp_upd->aperture_size = fdtdec_get_int(blob, node, "fsp,aperture-size",
> > + fsp_upd->aperture_size);
> > + fsp_upd->gtt_size = fdtdec_get_int(blob, node, "fsp,gtt-size",
> > + fsp_upd->gtt_size);
> > + fsp_upd->serial_debug_port_address = fdtdec_get_int(blob, node,
> > + "fsp,serial-debug-port-address",
> > + fsp_upd->serial_debug_port_address);
> > + fsp_upd->serial_debug_port_type = fdtdec_get_int(blob, node,
> > + "fsp,serial-debug-port-type",
> > + fsp_upd->serial_debug_port_type);
> > + fsp_upd->mrc_debug_msg = fdtdec_get_int(blob, node, "fsp,mrc-debug-msg",
> > + fsp_upd->mrc_debug_msg);
> > + fsp_upd->isp_enable = fdtdec_get_int(blob, node, "fsp,isp-enable",
> > + fsp_upd->isp_enable);
> > + fsp_upd->scc_enable_pci_mode = fdtdec_get_int(blob, node,
> > + "fsp,scc-enable-pci-mode",
> > + fsp_upd->scc_enable_pci_mode);
> > + fsp_upd->igd_render_standby = fdtdec_get_int(blob, node,
> > + "fsp,igd-render-standby",
> > + fsp_upd->igd_render_standby);
> > + fsp_upd->txe_uma_enable = fdtdec_get_int(blob, node, "fsp,txe-uma-enable",
> > + fsp_upd->txe_uma_enable);
> > + fsp_upd->os_selection = fdtdec_get_int(blob, node, "fsp,os-selection",
> > + fsp_upd->os_selection);
> > + fsp_upd->emmc45_ddr50_enabled = fdtdec_get_int(blob, node,
> > + "fsp,emmc45-ddr50-enabled",
> > + fsp_upd->emmc45_ddr50_enabled);
> > + fsp_upd->emmc45_hs200_enabled = fdtdec_get_int(blob, node,
> > + "fsp,emmc45-hs200-enabled",
> > + fsp_upd->emmc45_hs200_enabled);
> > + fsp_upd->emmc45_retune_timer_value = fdtdec_get_int(blob, node,
> > + "fsp,emmc45-retune-timer-value",
> > + fsp_upd->emmc45_retune_timer_value);
> > + fsp_upd->igd_render_standby = fdtdec_get_int(blob, node,
> > + "fsp,igd-render-standby",
> > + fsp_upd->igd_render_standby);
> >
> > mem = &fsp_upd->memory_params;
> > - mem->enable_memory_down = 1;
> > - mem->dram_speed = 1;
> > - mem->dimm_width = 1;
> > - mem->dimm_density = 2;
> > - mem->dimm_tcl = 0xb;
> > - mem->dimm_trpt_rcd = 0xb;
> > - mem->dimm_twr = 0xc;
> > - mem->dimm_twtr = 6;
> > - mem->dimm_trrd = 6;
> > - mem->dimm_trtp = 6;
> > - mem->dimm_tfaw = 0x14;
> > + mem->enable_memory_down = fdtdec_get_int(blob, node,
> > + "fsp,enable-memory-down",
> > + mem->enable_memory_down);
> > + node = fdtdec_next_compatible(blob, node,
> > + COMPAT_INTEL_BAYTRAIL_FSP_MDP);
> > + if (node < 0) {
> > + debug("%s: Cannot find FSP memory-down-params node\n", __func__);
> > + } else {
> > + mem->dram_speed = fdtdec_get_int(blob, node, "fsp,dram-speed",
> > + mem->dram_speed);
> > + mem->dram_type = fdtdec_get_int(blob, node, "fsp,dram-type",
> > + mem->dram_type);
> > + mem->dimm_0_enable = fdtdec_get_int(blob, node, "fsp,dimm-0-enable",
> > + mem->dimm_0_enable);
> > + mem->dimm_1_enable = fdtdec_get_int(blob, node, "fsp,dimm-1-enable",
> > + mem->dimm_1_enable);
> > + mem->dimm_width = fdtdec_get_int(blob, node, "fsp,dimm-width",
> > + mem->dimm_width);
> > + mem->dimm_density = fdtdec_get_int(blob, node,
> > + "fsp,dimm-density",
> > + mem->dimm_density);
> > + mem->dimm_bus_width = fdtdec_get_int(blob, node,
> > + "fsp,dimm-bus-width",
> > + mem->dimm_bus_width);
> > + mem->dimm_sides = fdtdec_get_int(blob, node, "fsp,dimm-sides",
> > + mem->dimm_sides);
> > + mem->dimm_tcl = fdtdec_get_int(blob, node, "fsp,dimm-tcl",
> > + mem->dimm_tcl);
> > + mem->dimm_trpt_rcd = fdtdec_get_int(blob, node, "fsp,dimm-trpt-rcd",
> > + mem->dimm_trpt_rcd);
> > + mem->dimm_twr = fdtdec_get_int(blob, node, "fsp,dimm-twr",
> > + mem->dimm_twr);
> > + mem->dimm_twtr = fdtdec_get_int(blob, node, "fsp,dimm-twtr",
> > + mem->dimm_twtr);
> > + mem->dimm_trrd = fdtdec_get_int(blob, node, "fsp,dimm-trrd",
> > + mem->dimm_trrd);
> > + mem->dimm_trtp = fdtdec_get_int(blob, node, "fsp,dimm-trtp",
> > + mem->dimm_trtp);
> > + mem->dimm_tfaw = fdtdec_get_int(blob, node, "fsp,dimm-tfaw",
> > + mem->dimm_tfaw);
> > + }
> > }
> > diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
> > index 0e59b18..279d08d 100644
> > --- a/arch/x86/dts/minnowmax.dts
> > +++ b/arch/x86/dts/minnowmax.dts
> > @@ -121,6 +121,36 @@
> > 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
> > };
> >
> > + fsp {
> > + compatible = "intel,baytrail-fsp";
> > + fsp,mrc-init-tseg-size = <8>;
> > + fsp,mrc-init-mmio-size = <0x800>;
> > + fsp,emmc-boot-mode = <0xff>;
> > + fsp,enable-sdio = <1>;
> > + fsp,enable-sdcard = <1>;
> > + fsp,enable-hsuart0 = <1>;
> > + fsp,enable-i2-c0 = <0>;
> > + fsp,enable-i2-c2 = <0>;
> > + fsp,enable-i2-c3 = <0>;
> > + fsp,enable-i2-c4 = <0>;
> > + fsp,enable-xhci = <0>;
> > + fsp,igd-render-standby = <1>;
> > + fsp,enable-memory-down = <1>;
> > + fsp,memory-down-params {
> > + compatible = "intel,baytrail-fsp-mdp";
> > + fsp,dram-speed = <1>;
> > + fsp,dimm-width = <1>;
> > + fsp,dimm-density = <2>;
> > + fsp,dimm-tcl = <0xb>;
> > + fsp,dimm-trpt-rcd = <0xb>;
> > + fsp,dimm-twr = <0xc>;
> > + fsp,dimm-twtr = <6>;
> > + fsp,dimm-trrd = <6>;
> > + fsp,dimm-trtp = <6>;
> > + fsp,dimm-tfaw = <0x14>;
> > + };
> > + };
> > +
> > spi {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > diff --git a/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt
> > new file mode 100644
> > index 0000000..979d646
> > --- /dev/null
> > +++ b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt
> > @@ -0,0 +1,119 @@
> > +Intel Bay Trail FSP UPD Binding
> > +==============================
> > +
> > +The device tree node which describes the overriding of the Intel Bay Trail FSP
> > +UPD data for configuring the SoC.
> > +
> > +All properties are optional, if a property is unspecified then the FSP's
> > +preconfigured choices will be used. For this reason, using normal boolean
> > +properties is not desired as the lack of a boolean property would disable a
> > +given property and force the user to include all properties they wish to enable.
> > +
>
> My understanding is that we either use device tree or the FSP
> defaults. So if we describe an FSP node in device tree, then we go
> with device tree as U-Boot's configuration. We cannot use partial
> configuration from device tree and partial from FSP defaults. That's
> confusing.
I agree that it could be confusing, even just in writing this patch and
trying to test it I've run into the fact that in order to see if I'm
properly overriding the FSP's configuration that I would need to build a
bunch of different FSP configurations in Intel's Binary Configuration
Tool. I've not done this as it would be extremely time consuming.
I'm open to making the properties into bools and then overriding all of
the FSP's UPD fields with sane defaults if the device tree does not
specify a non-bool property. I now think this might be a more sane
approach for the long run, but I would need some assistance to know what
the proper settings are for MinnowMax as I do not have one to test with
and I do not know the full backstory as to why the FSP that shipped with
MinnowMax was found to need to have its UPD overridden prior to my
patch.
> > +All properties can be found within the `upd-region` struct in
> > +arch/x86/include/asm/arch-baytrail/fsp/fsp-vpd.h, under the same names, and in
> > +Intel's FSP Binary Configuration Tool for Bay Trail.
> > +
> > +Optional properties:
> > +
> > +- fsp,mrc-init-tseg-size
> > +- fsp,mrc-init-mmio-size
> > +- fsp,mrc-init-spd-addr1
> > +- fsp,mrc-init-spd-addr2
> > +- fsp,emmc-boot-mode
> > +- fsp,enable-sdio
> > +- fsp,enable-sdcard
> > +- fsp,enable-hsuart0
> > +- fsp,enable-hsuart1
> > +- fsp,enable-spi
> > +- fsp,enable-sata
> > +- fsp,sata-mode
> > +- fsp,enable-azalia
> > +- fsp,enable-xhci
> > +- fsp,enable-lpe
> > +- fsp,lpss-sio-enable-pci-mode
> > +- fsp,enable-dma0
> > +- fsp,enable-dma1
> > +- fsp,enable-i2-c0
> > +- fsp,enable-i2-c1
> > +- fsp,enable-i2-c2
> > +- fsp,enable-i2-c3
> > +- fsp,enable-i2-c4
> > +- fsp,enable-i2-c5
> > +- fsp,enable-i2-c6
> > +- fsp,enable-pwm0
> > +- fsp,enable-pwm1
> > +- fsp,enable-hsi
> > +- fsp,igd-dvmt50-pre-alloc
> > +- fsp,aperture-size
> > +- fsp,gtt-size
> > +- fsp,serial-debug-port-address
> > +- fsp,serial-debug-port-type
> > +- fsp,mrc-debug-msg
> > +- fsp,isp-enable
> > +- fsp,scc-enable-pci-mode
> > +- fsp,igd-render-standby
> > +- fsp,txe-uma-enable
> > +- fsp,os-selection
> > +- fsp,emmc45-ddr50-enabled
> > +- fsp,emmc45-hs200-enabled
> > +- fsp,emmc45-retune-timer-value
> > +- fsp,enable-memory-down
> > +
> > +- fsp,memory-down-params {
> > +
> > + The following are only used if enable-memory-down is set, otherwise
> > + the FSP will use the DIMM's SPD information to configure the memory:
> > + - fsp,dram-speed
> > + - fsp,dram-type
> > + - fsp,dimm-0-enable
> > + - fsp,dimm-1-enable
> > + - fsp,dimm-width
> > + - fsp,dimm-density
> > + - fsp,dimm-bus-width
> > + - fsp,dimm-sides
> > + - fsp,dimm-tcl
> > + - fsp,dimm-trpt-rcd
> > + - fsp,dimm-twr
> > + - fsp,dimm-twtr
> > + - fsp,dimm-trrd
> > + - fsp,dimm-trtp
> > + - fsp,dimm-tfaw
> > +};
> > +
> > +Example (from MinnowMax Dual Core):
> > +-----------------------------------
> > +
> > +/ {
> > + ...
> > +
> > + fsp {
> > + compatible = "intel,baytrail-fsp";
> > + fsp,mrc-init-tseg-size = <8>;
> > + fsp,mrc-init-mmio-size = <0x800>;
> > + fsp,emmc-boot-mode = <0xff>;
> > + fsp,enable-sdio = <1>;
> > + fsp,enable-sdcard = <1>;
> > + fsp,enable-hsuart0 = <1>;
> > + fsp,enable-i2-c0 = <0>;
> > + fsp,enable-i2-c2 = <0>;
> > + fsp,enable-i2-c3 = <0>;
> > + fsp,enable-i2-c4 = <0>;
> > + fsp,enable-xhci = <0>;
> > + fsp,igd-render-standby = <1>;
> > + fsp,memory-down-params {
> > + compatible = "intel,baytrail-fsp-mdp";
> > + fsp,dram-speed = <1>;
> > + fsp,dimm-width = <1>;
> > + fsp,dimm-density = <2>;
> > + fsp,dimm-tcl = <0xb>;
> > + fsp,dimm-trpt-rcd = <0xb>;
> > + fsp,dimm-twr = <0xc>;
> > + fsp,dimm-twtr = <6>;
> > + fsp,dimm-trrd = <6>;
> > + fsp,dimm-trtp = <6>;
> > + fsp,dimm-tfaw = <0x14>;
> > + };
> > + };
> > +
> > + ...
> > +};
> > diff --git a/include/fdtdec.h b/include/fdtdec.h
> > index 2323603..76d07eb 100644
> > --- a/include/fdtdec.h
> > +++ b/include/fdtdec.h
> > @@ -183,6 +183,8 @@ enum fdt_compat_id {
> > COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */
> > COMPAT_INTEL_PCH, /* Intel PCH */
> > COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */
> > + COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */
> > + COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel Bay Trail FSP memory-down params */
> >
> > COMPAT_COUNT,
> > };
> > diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> > index 9877849..1e48b82 100644
> > --- a/lib/fdtdec.c
> > +++ b/lib/fdtdec.c
> > @@ -76,6 +76,8 @@ static const char * const compat_names[COMPAT_COUNT] = {
> > COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
> > COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
> > COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"),
> > + COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
> > + COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
> > };
> >
> > const char *fdtdec_get_compatible(enum fdt_compat_id id)
> > --
>
> Regards,
> Bin
Thanks for taking the time to review! I appreciate it :)
-Andrew
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