[U-Boot] [PATCH 3/5] arm1176/cpu: Align cache flushing addresses to cacheline size

Stephen Warren swarren at wwwdotorg.org
Sat Jul 11 07:21:59 CEST 2015


On 07/04/2015 03:48 AM, Alexander Stein wrote:
> cache flushing addresses must be cacheline size aligned, so mask the
> start and stop address appropriately.

As mentioned elsewhere, NAK.


More information about the U-Boot mailing list