[U-Boot] [PATCH 2/6] dm: pci: Correct primary/secondary/subordinate bus number assignment

[Simon Glass]

Hi Bin,

On 19 July 2015 at 20:38, Bin Meng <bmeng.cn at gmail.com> wrote:
> Hi Simon,
>
> On Mon, Jul 20, 2015 at 9:59 AM, Simon Glass <sjg at chromium.org> wrote:
>> Hi Bin,
>>
>> On 18 July 2015 at 10:20, Bin Meng <bmeng.cn at gmail.com> wrote:
>>> In driver model, each pci bridge device has its own hose structure.
>>> hose->first_busno points to the bridge device's device number, so
>>> we should not substract hose->first_busno before programming the
>>> bridge device's primary/secondary/subordinate bus number registers.
>>>
>>> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>>> ---
>>>
>>>  drivers/pci/pci_auto.c | 9 +++++++++
>>>  1 file changed, 9 insertions(+)
>>
>> Acked-by: Simon Glass <sjg at chromium.org>
>> Tested-by: Simon Glass <sjg at chromium.org>
>>
>> I'm not happy with how each PCI bridge has its own hose structure. I
>> think that was a mistake. It just creates problems.
>>
>> I'm thinking we should instead have a UCLASS_PCI which is strictly for
>> the PCI controller, and a new UCLASS_PCI_BRIDGE for bridges.
>>
>> What do you think?
>>
>
> I guess that may help. During the debug, I feel the dm pci codes are
> really not that intuitive than the previous non-dm version. It took me
> sometime to figure out where is the problem.

Agreed. Part of the problem I think is that it is still compatible
with the old code.

We should be able to do things like pci_read_config16(struct udevice *dev, ...)

I guess we could move to separate things more.

Regards,
Simon