[U-Boot] [PATCH V2 6/6] T210: Add support for 64-bit T210-based P2571 board

[Tom Warren]

Stephen,

> -----Original Message-----
> From: Stephen Warren [mailto:swarren at wwwdotorg.org]
> Sent: Wednesday, July 22, 2015 11:05 AM
> To: Tom Warren
> Cc: u-boot at lists.denx.de; Thierry Reding; Stephen Warren;
> tomcwarren3959 at gmail.com
> Subject: Re: [U-Boot] [PATCH V2 6/6] T210: Add support for 64-bit T210-based
> P2571 board
> 
> On 07/20/2015 01:50 PM, Tom Warren wrote:
> > Based on Venice2, incorporates Stephen Warren's latest P2571 pinmux
> > table.
> >
> > With Thierry Reding's 64-bit build fixes, this will build and and boot
> > in 64-bit on my P2571 (when used with a 32-bit AVP loader).
> 
> > diff --git a/include/configs/venice2.h b/include/configs/p2571.h
> 
> >   /* USB Host support */
> >   #define CONFIG_USB_EHCI
> >   #define CONFIG_USB_EHCI_TEGRA
> > -#define CONFIG_USB_MAX_CONTROLLER_COUNT	2
> > +#define CONFIG_USB_MAX_CONTROLLER_COUNT	1
> 
> Why's that?
There's only 1 usable USB2.0 port on P2571 (micro-USB). AFAIK the other ports on the other controller aren't usable in U-Boot.

> 
> > -/* USB networking support */
> > -#define CONFIG_USB_HOST_ETHER
> > -#define CONFIG_USB_ETHER_ASIX
> > -
> > -/* General networking support */
> > -#define CONFIG_CMD_DHCP
> 
> I assume that's to solve some compile issue? If so, a FIXME/TODO comment
> (like you added for tegra-common-usb-gadget.h) would be better, so it's
> obvious we need to go back and re-enable it.
> 
> > +#if defined(CONFIG_ARM64)
> > +#define COUNTER_FREQUENCY	12000000
> > +#define CPU_RELEASE_ADDR	0x80000000
> > +#endif
> 
> CONFIG_ARM64 is always true now.
True. I'll remove it.
> 
> According to the schematics, the crystal frequency is 38.4MHz.
> 
> Where did the value of CPU_RELEASE_ADDR come from? It's odd that there
> are 4 CPUs but only 1 release address.
Both of these came from Thierry's staging/work branch - perhaps he can answer (I'll change the freq to 38.4MHz).

> 
> > diff --git a/include/configs/tegra124-common.h
> > b/include/configs/tegra210-common.h
> 
> > -#define CONFIG_SYS_TEXT_BASE	0x80110000
> > +#define CONFIG_SYS_TEXT_BASE	0x8010E000
> 
> It'd be best to keep that consistent with earlier chips.
This is due to a change Simon just put in for Tegra124 only (running out of SPL space, I assume due to the Nyan-Big ChromeOS-isms). I don't think it's needed right now for T210 w/o SPL, and everyone tends to think of the CPU starting address as 0x8010E000, so I thought I'd keep T210 there.

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nvpublic