[U-Boot] [PATCH v3 25/25] rockchip: Add a simple README

Simon Glass sjg at chromium.org
Mon Jul 27 19:13:19 CEST 2015


Hi Andre,

On 27 July 2015 at 11:08, Andre Przywara <andre.przywara at arm.com> wrote:
>
> Hi Simon,
>
> On 24/06/15 00:29, Simon Glass wrote:
> > diff --git a/doc/README.rockchip b/doc/README.rockchip
> > new file mode 100644
> > index 0000000..a34e198
> > --- /dev/null
> > +++ b/doc/README.rockchip
>
> ....
>
> > +
> > +Future work
> > +===========
> > +
> > +Immediate priorities are:
> > +
> > +- MMC support (in U-Boot itself)
>
> Can you briefly sketch what is missing here? If I got this correctly,
> the SPL part has MMC working, right?
> If that works, we should be able to load a kernel from the SD card,
> shouldn't we?

Yes but it is untested. I suspect there will be a few issues but it
should not be hard to figure out.

>
> Cheers,
> Andre.
>
> P.S. Is there any news on the oversized SPL image? I disabled LED
> support in the SPL for the time being, so the resulting image is 32189
> Bytes (vanilla GCC 5.1.0) and it works for me now.

Does that GCC have the bug fix?

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54303
https://gcc.gnu.org/ml/gcc-patches/2015-05/msg00509.html

It will be a few weeks before I get back to this sorry.

Regards,
Simon

>
>
> > +- GPIO (driver exists but is lightly tested)
> > +- I2C (driver exists but is non-functional)
> > +- USB host
> > +- USB device
> > +- PMIC and regulators (only ACT8846 is supported at present)
> > +- LCD and HDMI
> > +- Run CPU at full speed
> > +- Ethernet
> > +- NAND flash
> > +- Support for other Rockchip parts
> > +- Boot U-Boot proper over USB OTG (at present only SPL works)
> > +
> > +
> > +Development Notes
> > +=================
> > +
> > +There are plenty of patches in the links below to help with this work.
> > +
> > +[1] https://github.com/rkchrome/uboot.git
> > +[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
> > +[3] https://github.com/linux-rockchip/rkflashtool.git
> > +[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
> > +
> > +rkimage
> > +-------
> > +
> > +rkimage.c produces an SPL image suitable for sending directly to the boot ROM
> > +over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
> > +followed by u-boot-spl-dtb.bin.
> > +
> > +The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
> > +starts at 0xff700000 and extends to 0xff718000 where we put the stack.
> > +
> > +rksd
> > +----
> > +
> > +rksd.c produces an image consisting of 32KB of empty space, a header and
> > +u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
> > +most of the fields are unused by U-Boot. We just need to specify the
> > +signature, a flag and the block offset and size of the SPL image.
> > +
> > +The header occupies a single block but we pad it out to 4 blocks. The header
> > +is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
> > +image can be encoded too but we don't do that.
> > +
> > +The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
> > +or 0x40 blocks. This is a severe and annoying limitation. There may be a way
> > +around this limitation, since there is plenty of SRAM, but at present the
> > +board refuses to boot if this limit is exceeded.
> > +
> > +The image produced is padded up to a block boundary (512 bytes). It should be
> > +written to the start of an SD card using dd.
> > +
> > +Since this image is set to load U-Boot from the SD card at block offset,
> > +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
> > +u-boot-dtb.img to the SD card at that offset. See above for instructions.
> > +
> > +rkspi
> > +-----
> > +
> > +rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
> > +resulting image is then spread out so that only the first 2KB of each 4KB
> > +sector is used. The header is the same as with rksd and the maximum size is
> > +also 32KB (before spreading). The image should be written to the start of
> > +SPI flash.
> > +
> > +See above for instructions on how to write a SPI image.
> > +
> > +
> > +Device tree and driver model
> > +----------------------------
> > +
> > +Where possible driver model is used to provide a structure to the
> > +functionality. Device tree is used for configuration. However these have an
> > +overhead and in SPL with a 32KB size limit some shortcuts have been taken.
> > +In general all Rockchip drivers should use these features, with SPL-specific
> > +modifications where required.
> > +
> > +
> > +--
> > +Simon Glass <sjg at chromium.org>
> > +24 June 2015
> >


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