[U-Boot] [PATCH 3/3] ARM: tegra: Disable SPL and non-cached memory on 64-bit

[Stephen Warren]

From: Thierry Reding <treding at nvidia.com>

For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in
AArch64 mode so that we don't need the SPL. Non-cached memory is not
implemented (yet) for 64-bit ARM.

Signed-off-by: Thierry Reding <treding at nvidia.com>
Signed-off-by: Tom Warren <twarren at nvidia.com>
Signed-off-by: Stephen Warren <swarren at nvidia.com>
---
 include/configs/tegra-common.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 7b4c0d70636e..49fa8b321064 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -43,7 +43,9 @@
 #define CONFIG_SYS_MALLOC_LEN		(4 << 20)	/* 4MB  */
 #endif
 
+#ifndef CONFIG_ARM64
 #define CONFIG_SYS_NONCACHED_MEMORY	(1 << 20)       /* 1 MiB */
+#endif
 
 /*
  * NS16550 Configuration
@@ -101,9 +103,11 @@
 #define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
 
+#ifndef CONFIG_ARM64
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_USE_ARCH_MEMCPY
 #endif
+#endif
 
 /*-----------------------------------------------------------------------
  * Physical Memory Map
-- 
1.9.1