[U-Boot] [PATCH 2/2] net: lpc32xx: add RMII phy mode support

[LEMIEUX, SYLVAIN]

> From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Vladimir Zapolskiy
> Sent: 6-Jul-15 12:22 AM
>
> LPC32xx MAC and clock control configuration requires some minor quirks
> to deal with a phy connected by RMII.
>
> It's worth to mention that the kernel and legacy BSP from NXP sets
> SUPP_RESET_RMII == (1 << 11) bit, however the description of this bit is
> missing in shared LPC32x0 User Manual UM10326 Rev. 3, July 22, 2011
> and in LPC32x0 Draft User Mannual Rev. 00.27, November 20, 2008, also
> in my tests an SMSC LAN8700 phy device connected over RMII seems to
> work correctly without touching this bit.
>
> Add support of RMII, if CONFIG_RMII is defined, this option is aligned
> with a number of boards, which already define the same config value.
>
> Signed-off-by: Vladimir Zapolskiy <vz at mleia.com>
> ---
>  arch/arm/cpu/arm926ejs/lpc32xx/devices.c |  7 ++++++-
>  drivers/net/lpc32xx_eth.c                | 20 +++++++++++++++++---
>  2 files changed, 23 insertions(+), 4 deletions(-)
>

Resent as the original tested by e-mail did not record on patchwork;

I tested this patch and the 3 patches listed below using a Micrel
KSZ8031RNL phy connected over RMII. Everything is working properly.
- http://patchwork.ozlabs.org/patch/489100/
- http://patchwork.ozlabs.org/patch/489190/
- http://patchwork.ozlabs.org/patch/491419/

Tested-by: Sylvain Lemieux <slemieux at tycoint.com>

________________________________

This e-mail contains privileged and confidential information intended for the use of the addressees named above. If you are not the intended recipient of this e-mail, you are hereby notified that you must not disseminate, copy or take any action in respect of any information contained in it. If you have received this e-mail in error, please notify the sender immediately by e-mail and immediately destroy this e-mail and its attachments.