[U-Boot] [PATCH 4/7] x86: baytrail: Update UPD setting for FSP Gold4 release

Bin Meng bmeng.cn at gmail.com
Thu Jul 30 12:49:15 CEST 2015


BayTrail FSP Gold4 release adds one UPD parameter to control IGD
enable/disable.

Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
---

 arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
index 82862f6..eb0d506 100644
--- a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
+++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
@@ -75,7 +75,8 @@ struct __packed upd_region {
 	uint8_t emmc45_ddr50_enabled;		/* Offset 0x0051 */
 	uint8_t emmc45_hs200_enabled;		/* Offset 0x0052 */
 	uint8_t emmc45_retune_timer_value;	/* Offset 0x0053 */
-	uint8_t unused_upd_space1[156];		/* Offset 0x0054 */
+	uint8_t enable_igd;			/* Offset 0x0054 */
+	uint8_t unused_upd_space1[155];		/* Offset 0x0055 */
 	struct memory_down_data memory_params;	/* Offset 0x00f0 */
 	uint16_t terminator;			/* Offset 0x0100 */
 };
-- 
1.8.2.1



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