[U-Boot] [PATCH v2 17/47] pci: Fix up code for CONFIG_PCI_ENUM_ONLY

Simon Glass sjg at chromium.org
Fri Jul 31 17:31:34 CEST 2015


This option is not used by any board but appears to still be useful, at least
for testing. With recent commits it does not build, so fix it.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

Changes in v2: None

 drivers/pci/pci_auto.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 7ff282b..51d2ac0 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -82,9 +82,9 @@ void pciauto_setup_device(struct pci_controller *hose,
 	pci_size_t bar_size;
 	u16 cmdstat = 0;
 	int bar, bar_nr = 0;
+#ifndef CONFIG_PCI_ENUM_ONLY
 	u8 header_type;
 	int rom_addr;
-#ifndef CONFIG_PCI_ENUM_ONLY
 	pci_addr_t bar_value;
 	struct pci_region *bar_res;
 	int found_mem64 = 0;
@@ -181,6 +181,7 @@ void pciauto_setup_device(struct pci_controller *hose,
 		bar_nr++;
 	}
 
+#ifndef CONFIG_PCI_ENUM_ONLY
 	/* Configure the expansion ROM address */
 	pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
 	if (header_type != PCI_HEADER_TYPE_CARDBUS) {
@@ -201,6 +202,7 @@ void pciauto_setup_device(struct pci_controller *hose,
 			debug("\n");
 		}
 	}
+#endif
 
 	pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat);
 	pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE,
-- 
2.5.0.rc2.392.g76e840b



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