[U-Boot] [RFC 03/11] mtd/nand: support ONFI timing mode retrieval for non-ONFI
Boris Brezillon
boris.brezillon at free-electrons.com
Sun Jun 14 13:53:35 CEST 2015
On Fri, 5 Jun 2015 13:52:36 +0200
Roy Spliet <r.spliet at ultimaker.com> wrote:
That one has been accepted, so I guess it will be taken by Scott during
his sync with the last mainline kernel.
> From: yassin <yassinjaffer at gmail.com>
>
> Signed-off-by: Roy Spliet <r.spliet at ultimaker.com>
> ---
> drivers/mtd/nand/nand_base.c | 1 +
> include/linux/mtd/nand.h | 7 +++++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index c0e381a..dbeb092 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -3709,6 +3709,7 @@ static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
> chip->options |= type->options;
> chip->ecc_strength_ds = NAND_ECC_STRENGTH(type);
> chip->ecc_step_ds = NAND_ECC_STEP(type);
> + chip->onfi_timing_mode_ds = type->onfi_timing_mode_ds;
>
> *busw = type->options & NAND_BUSWIDTH_16;
>
> diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
> index abda5c3..0cdb3b9 100644
> --- a/include/linux/mtd/nand.h
> +++ b/include/linux/mtd/nand.h
> @@ -634,6 +634,7 @@ struct nand_buffers {
> * @ecc_step_ds: [INTERN] ECC step required by the @ecc_strength_ds,
> * also from the datasheet. It is the recommended ECC step
> * size, if known; if unknown, set to zero.
> + * @onfi_timing_mode_ds:[INTERN] ONFI timing mode deduced from datasheet.
> * @numchips: [INTERN] number of physical chips
> * @chipsize: [INTERN] the size of one chip for multichip arrays
> * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
> @@ -718,6 +719,7 @@ struct nand_chip {
> uint8_t bits_per_cell;
> uint16_t ecc_strength_ds;
> uint16_t ecc_step_ds;
> + int onfi_timing_mode_ds;
> int badblockpos;
> int badblockbits;
>
> @@ -822,6 +824,10 @@ struct nand_chip {
> * @ecc_step_ds in nand_chip{}, also from the datasheet.
> * For example, the "4bit ECC for each 512Byte" can be set with
> * NAND_ECC_INFO(4, 512).
> + * @onfi_timing_mode_ds: the ONFI timing mode supported by this NAND chip. This
> + * should be deduced from timings described in the
> + * datasheet.
> + *
> */
> struct nand_flash_dev {
> char *name;
> @@ -842,6 +848,7 @@ struct nand_flash_dev {
> uint16_t strength_ds;
> uint16_t step_ds;
> } ecc;
> + int onfi_timing_mode_ds;
> };
>
> /**
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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