[U-Boot] [PATCH 0/6] spi: cadence_qspi: optimize & fix indirect read-writes

[Vikas MANOCHA]

Hello All,

I just figured out that this patchset has dependency on another patchset under review. I am not sure how to handle situations like this.
I can think of following options, please let me know if anyone of these is ok:

- I send the next version of my previous patchset (under review) with addition of this patchset. With it, all the patches will apply on master.
- wait for the previous patchset to get in mainline....(might take some time).

Rgds,
Vikas

> -----Original Message-----
> From: Vikas MANOCHA
> Sent: Monday, June 15, 2015 11:19 AM
> To: u-boot at lists.denx.de; sr at denx.de; grmoore at opensource.altera.com;
> dinguyen at opensource.altera.com
> Cc: Vikas MANOCHA
> Subject: [PATCH 0/6] spi: cadence_qspi: optimize & fix indirect read-writes
> 
> This patchset:
> - removes sram polling while reading/writing from flash.
> - fixes trigger base & transfer start address register programming. This fix
> superseeds the previous patch "spi: cadence_qspi: Fix the indirect ahb
> trigger address setting"
> - adds support to get fifo width from device tree
> 
> Vikas Manocha (6):
>   spi: cadence_qspi: remove sram polling from flash read
>   spi: cadence_qspi: remove sram polling from flash write
>   spi: cadence_qspi: move trigger base configuration in init
>   spi: cadence_qspi: fix indirect read/write start address
>   spi: cadence_qspi: fix base trigger address & transfer start address
>   spi: cadence_qspi: get fifo width from device tree
> 
>  arch/arm/dts/socfpga.dtsi      |    2 +
>  arch/arm/dts/stv0991.dts       |    4 +-
>  drivers/spi/cadence_qspi.c     |   14 +++--
>  drivers/spi/cadence_qspi.h     |    6 +-
>  drivers/spi/cadence_qspi_apb.c |  124 +++++++++-------------------------------
>  5 files changed, 43 insertions(+), 107 deletions(-)
> 
> --
> 1.7.9.5