[U-Boot] [PATCH 02/10] x86: queensbay: Correct Topcliff device irqs

[Simon Glass]

On 15 June 2015 at 01:59, Bin Meng <bmeng.cn at gmail.com> wrote:
> There are 4 usb ports on the Intel Crown Bay board, 2 of which are
> connected to Topcliff usb host 0 and the other 2 connected to usb
> host 1. USB devices inserted in the ports connected to usb host 1
> cannot get detected due to wrong IRQ assigned to the controller.
> Actually we need apply the PCI interrupt pin swizzling logic to all
> devices on the Topcliff chipset when configuring the PIRQ routing.
>
> This was observed on usb ports, but device 6 and 10 irqs are also
> wrong. Correct them all together.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> ---
>
>  arch/x86/dts/crownbay.dts | 24 ++++++++++++------------
>  1 file changed, 12 insertions(+), 12 deletions(-)

Acked-by: Simon Glass <sjg at chromium.org>