[U-Boot] [PATCH 07/10] x86: Add I/O APIC register access inline routines

[Bin Meng]

Hi Simon,

On Tue, Jun 16, 2015 at 10:46 AM, Simon Glass <sjg at chromium.org> wrote:
> Hi Bin,
>
> On 15 June 2015 at 01:59, Bin Meng <bmeng.cn at gmail.com> wrote:
>> I/O APIC registers are addressed indirectly. Add io_apic_read() and
>> io_apic_write() inline routines. Two macros for I/O APIC ID and
>> version register offset are also added.
>>
>> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>> ---
>>
>>  arch/x86/include/asm/ioapic.h | 34 ++++++++++++++++++++++++++++++++++
>>  1 file changed, 34 insertions(+)
>>
>> diff --git a/arch/x86/include/asm/ioapic.h b/arch/x86/include/asm/ioapic.h
>> index f5d69db..697eabb 100644
>> --- a/arch/x86/include/asm/ioapic.h
>> +++ b/arch/x86/include/asm/ioapic.h
>> @@ -9,10 +9,44 @@
>>  #ifndef __ASM_IOAPIC_H
>>  #define __ASM_IOAPIC_H
>>
>> +#include <asm/io.h>
>> +
>>  #define IO_APIC_ADDR           0xfec00000
>>
>>  /* Direct addressed register */
>>  #define IO_APIC_INDEX          (IO_APIC_ADDR + 0x00)
>>  #define IO_APIC_DATA           (IO_APIC_ADDR + 0x10)
>>
>> +/* Indirect addressed register offset */
>> +#define IO_APIC_ID             0x00
>> +#define IO_APIC_VER            0x01
>> +
>> +/**
>> + * io_apic_read() - Read I/O APIC register
>> + *
>> + * This routine reads I/O APIC indirect addressed register.
>> + *
>> + * @reg:       address of indirect addressed register
>> + * @return:    register value to read
>> + */
>> +static inline u32 io_apic_read(u32 reg)
>> +{
>> +       writel(reg, IO_APIC_INDEX);
>> +       return readl(IO_APIC_DATA);
>> +}
>
> Is there any reason these need to be inline?
>

No, but I was referring to asm/lapic.h inside which the lapic register
access routines are inline as well. Do you want to remove inline for
lapic and ioapic?

[snip]

Regards,
Bin