[U-Boot] [PATCH 4/5] sunxi: Sync sun8i dts files with the linux kernel

[Chen-Yu Tsai]

Copy over all the latest dts changes from mripard/sunxi/dt-for-4.2.
This adds a dts file for Sinlinx SinA33 dev board, and the required
changes in the .dtsi files.

Signed-off-by: Chen-Yu Tsai <wens at csie.org>
---
 arch/arm/dts/sun8i-a23-a33.dtsi                    |  10 ++
 ...sun8i-a33.dtsi => sun8i-a33-sinlinx-sina33.dts} | 106 ++++++++++++++-------
 arch/arm/dts/sun8i-a33.dtsi                        |   8 ++
 3 files changed, 91 insertions(+), 33 deletions(-)
 copy arch/arm/dts/{sun8i-a33.dtsi => sun8i-a33-sinlinx-sina33.dts} (56%)

diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi
index faea94e..7abd0ae 100644
--- a/arch/arm/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/dts/sun8i-a23-a33.dtsi
@@ -366,6 +366,16 @@
 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 			};
 
+			mmc2_8bit_pins: mmc2_8bit {
+				allwinner,pins = "PC5", "PC6", "PC8",
+						 "PC9", "PC10", "PC11",
+						 "PC12", "PC13", "PC14",
+						 "PC15";
+				allwinner,function = "mmc2";
+				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
 			i2c0_pins_a: i2c0 at 0 {
 				allwinner,pins = "PH2", "PH3";
 				allwinner,function = "i2c0";
diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
similarity index 56%
copy from arch/arm/dts/sun8i-a33.dtsi
copy to arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
index 9b43bc6..5788c29 100644
--- a/arch/arm/dts/sun8i-a33.dtsi
+++ b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
@@ -1,5 +1,5 @@
 /*
- * Copyright 2014 Chen-Yu Tsai
+ * Copyright 2015 Chen-Yu Tsai
  *
  * Chen-Yu Tsai <wens at csie.org>
  *
@@ -42,48 +42,88 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "sun8i-a23-a33.dtsi"
+/dts-v1/;
+#include "sun8i-a33.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
 
 / {
-	cpus {
-		cpu at 2 {
-			compatible = "arm,cortex-a7";
-			device_type = "cpu";
-			reg = <2>;
-		};
+	model = "Sinlinx SinA33";
+	compatible = "sinlinx,sina33", "allwinner,sun8i-a33";
+
+	aliases {
+		serial0 = &uart0;
+	};
 
-		cpu at 3 {
-			compatible = "arm,cortex-a7";
-			device_type = "cpu";
-			reg = <3>;
-		};
+	chosen {
+		stdout-path = "serial0:115200n8";
 	};
+};
 
-	memory {
-		reg = <0x40000000 0x80000000>;
+&lradc {
+	vref-supply = <&reg_vcc3v0>;
+	status = "okay";
+
+	button at 200 {
+		label = "Volume Up";
+		linux,code = <KEY_VOLUMEUP>;
+		channel = <0>;
+		voltage = <191011>;
 	};
 
-	clocks {
-		/* Dummy clock for pll11 (DDR1) until actually implemented */
-		pll11: pll11_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <0>;
-			clock-output-names = "pll11";
-		};
+	button at 400 {
+		label = "Volume Down";
+		linux,code = <KEY_VOLUMEDOWN>;
+		channel = <0>;
+		voltage = <391304>;
+	};
 
-		mbus_clk: clk at 01c2015c {
-			#clock-cells = <0>;
-			compatible = "allwinner,sun8i-a23-mbus-clk";
-			reg = <0x01c2015c 0x4>;
-			clocks = <&osc24M>, <&pll6 1>, <&pll5>, <&pll11>;
-			clock-output-names = "mbus";
-		};
+	button at 600 {
+		label = "Home";
+		linux,code = <KEY_HOME>;
+		channel = <0>;
+		voltage = <600000>;
 	};
 };
 
+&mmc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina33>;
+	vmmc-supply = <&reg_vcc3v0>;
+	bus-width = <4>;
+	cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+	cd-inverted;
+	status = "okay";
+};
+
+&mmc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc2_8bit_pins>;
+	vmmc-supply = <&reg_vcc3v0>;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&mmc2_8bit_pins {
+	/* eMMC is missing pull-ups */
+	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+};
+
 &pio {
-	compatible = "allwinner,sun8i-a33-pinctrl";
-	interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
-		     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+	mmc0_cd_pin_sina33: mmc0_cd_pin at 0 {
+		allwinner,pins = "PB4";
+		allwinner,function = "gpio_in";
+		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins_b>;
+	status = "okay";
 };
diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi
index 9b43bc6..85ee080 100644
--- a/arch/arm/dts/sun8i-a33.dtsi
+++ b/arch/arm/dts/sun8i-a33.dtsi
@@ -86,4 +86,12 @@
 	compatible = "allwinner,sun8i-a33-pinctrl";
 	interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 		     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+
+	uart0_pins_b: uart0 at 1 {
+		allwinner,pins = "PB0", "PB1";
+		allwinner,function = "uart0";
+		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+	};
+
 };
-- 
2.1.4