[U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width

[Vikas MANOCHA]

Hi Stefan,

> -----Original Message-----
> From: Stefan Roese [mailto:sr at denx.de]
> Sent: Friday, June 12, 2015 5:10 AM
> To: Vikas MANOCHA; u-boot at lists.denx.de;
> grmoore at opensource.altera.com; dinguyen at opensource.altera.com
> Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for
> FIFO width
> 
> Hi Vikas,
> 
> On 11.06.2015 21:16, Vikas MANOCHA wrote:
> > Any comments on the patchset.
> 
> I'll test them next week on a SoCFPGA based board and will comment then
> again.

Can you please test this patchset also.

Rgds,
Vikas

> 
> Thanks,
> Stefan