[U-Boot] [RESPIN PATCH v2 15/15] x86: queensbay: Change PCIe root ports' interrupt routing

Simon Glass sjg at chromium.org
Wed Jun 24 03:45:36 CEST 2015


On 22 June 2015 at 22:18, Bin Meng <bmeng.cn at gmail.com> wrote:
> So far interrupt routing works pretty well for any on-chip devices
> on Intel Crown Bay. When inserting any PCIe card to any PCIe slot,
> Linux kernel is smart enough to do interrupt swizzling and figure
> out device's irq using its parent bridge's interrupt routing info
> all the way up to its root port. In U-Boot all PCIe root ports'
> interrupts were routed to PIRQ E/F/G/H before, while actually all
> PCIe downstream ports received INTx are routed to PIRQ A/B/C/D
> directly and not configurable. Now we change this mapping so that
> any external PCIe device can work correctly.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>
> ---
>
> Changes in v2:
> - New patch to change PCIe root ports' interrupt routing for queensbay
>
>  arch/x86/cpu/queensbay/tnc.c | 13 +++++++------
>  arch/x86/dts/crownbay.dts    | 20 ++++++++++++++++----
>  2 files changed, 23 insertions(+), 10 deletions(-)

Acked-by: Simon Glass <sjg at chromium.org>


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