[U-Boot] [u-boot][PATCH] ARM: DRA7-evm: prevent DCAN1 _wait_target_disable failure in kernel

[Nishanth Menon]

On 06/24/2015 09:00 AM, Roger Quadros wrote:
> If board is booted with transitions happening on DCAN1 pins then
> the following warning is seen in the kernel at boot when the
> hwmod layer initializes.
> 
> "omap_hwmod: dcan1: _wait_target_disable failed"
> 
> This is because DCAN1 module's SWAKEUP mechanism is broken
> and it fails to correctly turn OFF if it sees a transition on the
> DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode
> while enabling/disabling DCAN1 module.
> 
> The hwmod layer enables and disables all modules at boot
> and we have no opportunity to put the DCAN1 pins in safe mode
> at that point.
> 
> DCAN1 is not used by u-boot so it doesn't matter to it if these
> pins are in safe mode. The kernel driver correctly configures
> the right mode when DCAN1 is active.
> 
> Signed-off-by: Roger Quadros <rogerq at ti.com>
> ---
>  board/ti/dra7xx/mux_data.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
> index c9301a5..91e00b9 100644
> --- a/board/ti/dra7xx/mux_data.h
> +++ b/board/ti/dra7xx/mux_data.h
> @@ -358,7 +358,7 @@ const struct pad_conf_entry dra74x_core_padconf_array[] = {
>  	{SPI2_D1, (M1 | PIN_INPUT_SLEW)},	/* spi2_d1.uart3_txd */
>  	{SPI2_D0, (M1 | PIN_INPUT_SLEW)},	/* spi2_d0.uart3_ctsn */
>  	{SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.uart3_rtsn */
> -	{DCAN1_TX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_tx.dcan1_tx */
> +	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
>  	{DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_rx.gpio1_15 */
>  	{UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.uart1_rxd */
>  	{UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_txd.uart1_txd */
> @@ -370,7 +370,7 @@ const struct pad_conf_entry dra74x_core_padconf_array[] = {
>  	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.mmc4_dat3 */
>  	{I2C2_SDA, (M0 | PIN_INPUT_PULLUP)},	/* i2c2_sda.i2c2_sda */
>  	{I2C2_SCL, (M0 | PIN_INPUT_PULLUP)},	/* i2c2_scl.i2c2_scl */
> -	{WAKEUP0, (M1 | PIN_OUTPUT)},	/* Wakeup0.dcan1_rx */
> +	{WAKEUP0, (M15 | PULL_UP)},	/* Wakeup0.safe for dcan1_rx */
>  	{WAKEUP2, (M14 | PIN_OUTPUT)},	/* Wakeup2.gpio1_2 */
>  };
>  
> 
LGTM, could you also look at x15 platform?

-- 
Regards,
Nishanth Menon