[U-Boot] [PATCH 06/12] fdt: armv8: Fix build warnings on armv8

[Haikun Wang]

From: Haikun Wang <Haikun.Wang at freescale.com>

Fix below build warnings on armv8,
drivers/spi/fsl_dspi.c: In function ‘fsl_dspi_ofdata_to_platdata’:
drivers/spi/fsl_dspi.c:667:2:
warning: format ‘%x’ expects argument of type ‘unsigned int’,
	but argument 2 has type ‘fdt_addr_t’ [-Wformat=]
debug("DSPI: regs=0x%x, max-frequency=%d, endianess=%s, num-cs=%d\n",
		    ^
lib/fdtdec.c: In function ‘fdtdec_get_addr_size’:
lib/fdtdec.c:105:4:
warning: format ‘%lx’ expects argument of type ‘long unsigned int’,
but argument 3 has type ‘fdt_size_t’ [-Wformat=]
debug("addr=%08lx, size=%08lx\n",
			    ^

Signed-off-by: Haikun Wang <haikun.wang at freescale.com>
---
 drivers/spi/fsl_dspi.c | 4 ++--
 lib/fdtdec.c           | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index 6476f91..7928531 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -664,8 +664,8 @@ static int fsl_dspi_ofdata_to_platdata(struct udevice *bus)
 	plat->speed_hz = fdtdec_get_int(blob,
 			node, "spi-max-frequency", FSL_DSPI_DEFAULT_SCK_FREQ);
 
-	debug("DSPI: regs=0x%x, max-frequency=%d, endianess=%s, num-cs=%d\n",
-	      plat->regs_addr, plat->speed_hz,
+	debug("DSPI: regs=0x%llx, max-frequency=%d, endianess=%s, num-cs=%d\n",
+	      (u64)plat->regs_addr, plat->speed_hz,
 	      plat->flags & DSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le",
 	      plat->num_chipselect);
 
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 80b897a..aeb9237 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -102,8 +102,8 @@ fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
 			size = (fdt_size_t *)((char *)cell +
 					sizeof(fdt_addr_t));
 			*sizep = fdt_size_to_cpu(*size);
-			debug("addr=%08lx, size=%08x\n",
-			      (ulong)addr, *sizep);
+			debug("addr=%08lx, size=%llx\n",
+			      (ulong)addr, (u64)*sizep);
 		} else {
 			debug("%08lx\n", (ulong)addr);
 		}
-- 
1.9.1