[U-Boot] [PATCH] Vexpress64: Fix the compiling error when CONFIG_ARMV8_MULTIENTRY defined

bhupesh.sharma at freescale.com bhupesh.sharma at freescale.com
Wed Mar 11 14:12:46 CET 2015


> -----Original Message-----
> From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of FengHua
> Sent: Wednesday, March 11, 2015 6:38 PM
> To: Linus Walleij
> Cc: U-Boot Mailing List
> Subject: Re: [U-Boot] [PATCH] Vexpress64: Fix the compiling error when
> CONFIG_ARMV8_MULTIENTRY defined
> 
> 
> 
> 
> > -----Original Messages-----
> > From: "Linus Walleij" <linus.walleij at linaro.org> Sent Time: 2015-03-10
> > 18:08:03 (Tuesday)
> > To: "David Feng" <fenghua at phytium.com.cn>
> > Cc: "U-Boot Mailing List" <u-boot at lists.denx.de>, "Tom Rini"
> > <trini at ti.com>, "Albert ARIBAUD" <albert.u.boot at aribaud.net>
> > Subject: Re: [PATCH] Vexpress64: Fix the compiling error when
> > CONFIG_ARMV8_MULTIENTRY defined
> >
> > On Tue, Mar 10, 2015 at 3:08 AM,  <fenghua at phytium.com.cn> wrote:
> >
> > > From: David Feng <fenghua at phytium.com.cn>
> > >
> > > CPU_RELEASE_ADDR should be defined when CONFIG_ARMV8_MULTIENTRY is
> used.
> > >
> > > Signed-off-by: David Feng <fenghua at phytium.com.cn>
> >
> > As asked earlier: how can I test this with FVP or the base model?
> >
> I usually use Foundation Model.
> 
> > I'm very interested in doing this as I guess it involves starting
> > U-Boot at EL3 on bare metal and I really want to try this.
> >
> > > +/* SMP Spin Table Definitions */
> > > +#ifdef CONFIG_BASE_FVP
> > > +#define CPU_RELEASE_ADDR               (CONFIG_SYS_SDRAM_BASE +
> 0x03f00000)
> > > +#else
> > > +#define CPU_RELEASE_ADDR               (CONFIG_SYS_SDRAM_BASE +
> 0x7fff0)
> > > +#endif
> >
> > Where are these address defines coming from?
> It's just hard coded and should be the same value with that in DTS.
> 
> >
> > Do these spin tables exist in a standard ARM FVP or base model?
> >
> > I get the impression that a secondary operating system is being booted
> > on the secondary CPU at one of these addresses, but why is it running
> > at these addresses specifically, and is that something coming with
> > these simulators, or is it some image that is loaded on the side, that
> > the community does not have access to?
> >
> PSCI is not implemented in uboot-armv8. If booting u-boot on bare-metal
> only spin table can be used. All we do is describing booting method(spin
> table) and cpu release address in DTS. Linux kernel get cpu release
> address from DTS also.
> 

Arnab's patches enable PSCI for amrv8 on u-boot:
http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/207882

We have tested the same on ARMv8 foundation model as well.

Regards,
Bhupesh


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