[U-Boot] [PATCH v3] mpc85xx/T104xD4RDB: Add T104xD4RDB boards support
Vijay Rai
vijay.rai at freescale.com
Tue Mar 17 12:59:09 CET 2015
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
T1040D4RDB is re-designed T1040RDB board with following changes :
- Support of DDR4 memory
- Support of 0x66 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
- Support of QE-TDM
Similarily T1042D4RDB is a Freescale reference board that hosts the T1040
SoC. T1042D4RDB is re-designed T1042RDB board with following changes :
- Support of DDR4 memory
- Support for 0x86 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 3 SGMII on DTSEC1, DTSEC2 & DTSEC3
- Support of DIU
Signed-off-by: Vijay Rai <vijay.rai at freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain at freescale.com>
---
changes from v2 :
- removes checkpatch error
board/freescale/t104xrdb/MAINTAINERS | 8 ++++++
board/freescale/t104xrdb/ddr.c | 6 ++++
board/freescale/t104xrdb/ddr.h | 13 ++++++++-
board/freescale/t104xrdb/eth.c | 20 +++++++++++--
board/freescale/t104xrdb/t1040d4_rcw.cfg | 7 +++++
board/freescale/t104xrdb/t1042d4_rcw.cfg | 7 +++++
board/freescale/t104xrdb/t104xrdb.c | 17 +++++++++--
configs/T1040D4RDB_NAND_defconfig | 5 ++++
configs/T1040D4RDB_SDCARD_defconfig | 5 ++++
configs/T1040D4RDB_SPIFLASH_defconfig | 5 ++++
configs/T1040D4RDB_defconfig | 4 +++
configs/T1042D4RDB_NAND_defconfig | 5 ++++
configs/T1042D4RDB_SDCARD_defconfig | 5 ++++
configs/T1042D4RDB_SPIFLASH_defconfig | 5 ++++
configs/T1042D4RDB_defconfig | 4 +++
include/configs/T104xRDB.h | 46 ++++++++++++++++++++++++------
16 files changed, 148 insertions(+), 14 deletions(-)
create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg
create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg
create mode 100644 configs/T1040D4RDB_NAND_defconfig
create mode 100644 configs/T1040D4RDB_SDCARD_defconfig
create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1040D4RDB_defconfig
create mode 100644 configs/T1042D4RDB_NAND_defconfig
create mode 100644 configs/T1042D4RDB_SDCARD_defconfig
create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1042D4RDB_defconfig
diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS
index 13d9be9..32e044f 100644
--- a/board/freescale/t104xrdb/MAINTAINERS
+++ b/board/freescale/t104xrdb/MAINTAINERS
@@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h
F: configs/T1040RDB_defconfig
F: configs/T1040RDB_NAND_defconfig
F: configs/T1040RDB_SPIFLASH_defconfig
+F: configs/T1040D4RDB_defconfig
+F: configs/T1040D4RDB_NAND_defconfig
+F: configs/T1040D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_defconfig
+F: configs/T1042D4RDB_defconfig
+F: configs/T1042D4RDB_NAND_defconfig
+F: configs/T1042D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_PI_defconfig
F: configs/T1042RDB_PI_NAND_defconfig
F: configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD
#M: -
S: Maintained
F: configs/T1040RDB_SDCARD_defconfig
+F: configs/T1040D4RDB_SDCARD_defconfig
+F: configs/T1042D4RDB_SDCARD_defconfig
F: configs/T1042RDB_PI_SDCARD_defconfig
T1040RDB_SECURE_BOOT BOARD
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index e1148e5..3c4eabf 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -91,8 +91,14 @@ found:
popts->zq_en = 1;
/* DHC_EN =1, ODT = 75 Ohm */
+#ifdef CONFIG_SYS_FSL_DDR4
+ popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
+ popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
+ DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
+#else
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+#endif
}
#if defined(CONFIG_DEEP_SLEEP)
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h
index ab1c32d..eb6ec70 100644
--- a/board/freescale/t104xrdb/ddr.h
+++ b/board/freescale/t104xrdb/ddr.h
@@ -28,6 +28,13 @@ static const struct board_specific_parameters udimm0[] = {
* num| hi| rank| clk| wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2
*/
+#ifdef CONFIG_SYS_FSL_DDR4
+ {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A},
+ {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 1666, 0, 4, 6, 0x0708090B, 0x0C0D0E09},
+ {1, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 2200, 0, 4, 7, 0x08090A0D, 0x0F0F100C},
+#elif defined(CONFIG_SYS_FSL_DDR3)
{2, 833, 4, 4, 6, 0x06060607, 0x08080807},
{2, 833, 0, 4, 6, 0x06060607, 0x08080807},
{2, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09},
@@ -40,10 +47,14 @@ static const struct board_specific_parameters udimm0[] = {
{1, 1350, 0, 4, 7, 0x0708080A, 0x0A0B0C09},
{1, 1666, 4, 4, 7, 0x0808090B, 0x0C0D0E0A},
{1, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A},
+#else
+#error DDR type not defined
+#endif
{}
};
+#endif
+
static const struct board_specific_parameters *udimms[] = {
udimm0,
};
-#endif
diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c
index 7581a4cd..9c4e922 100644
--- a/board/freescale/t104xrdb/eth.c
+++ b/board/freescale/t104xrdb/eth.c
@@ -43,9 +43,11 @@ int board_eth_init(bd_t *bis)
int idx = i - FM1_DTSEC1;
switch (fm_info_get_enet_if(i)) {
-#ifdef CONFIG_T1040RDB
+#if defined(CONFIG_T1040RDB) || (CONFIG_T1040D4RDB)
case PHY_INTERFACE_MODE_SGMII:
- /* T1040RDB only supports SGMII on DTSEC3 */
+ /* T1040RDB & T1040D4RDB only supports SGMII on
+ * DTSEC3
+ */
fm_info_set_phy_address(FM1_DTSEC3,
CONFIG_SYS_SGMII1_PHY_ADDR);
break;
@@ -60,6 +62,20 @@ int board_eth_init(bd_t *bis)
CONFIG_SYS_SGMII1_PHY_ADDR);
break;
#endif
+#ifdef CONFIG_T1042D4RDB
+ case PHY_INTERFACE_MODE_SGMII:
+ /* T1042D4RDB supports SGMII on DTSEC1, DTSEC2
+ * & DTSEC3
+ */
+ if (FM1_DTSEC1 == i)
+ phy_addr = CONFIG_SYS_SGMII1_PHY_ADDR;
+ if (FM1_DTSEC2 == i)
+ phy_addr = CONFIG_SYS_SGMII2_PHY_ADDR;
+ if (FM1_DTSEC3 == i)
+ phy_addr = CONFIG_SYS_SGMII3_PHY_ADDR;
+ fm_info_set_phy_address(i, phy_addr);
+ break;
+#endif
case PHY_INTERFACE_MODE_RGMII:
if (FM1_DTSEC4 == i)
phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR;
diff --git a/board/freescale/t104xrdb/t1040d4_rcw.cfg b/board/freescale/t104xrdb/t1040d4_rcw.cfg
new file mode 100644
index 0000000..3300c18
--- /dev/null
+++ b/board/freescale/t104xrdb/t1040d4_rcw.cfg
@@ -0,0 +1,7 @@
+#PBL preamble and RCW header
+aa55aa55 010e0100
+# serdes protocol 0x66
+0c18000e 0e000000 00000000 00000000
+66000002 80000002 e8106000 01000000
+00000000 00000000 00000000 00032810
+00000000 0342500f 00000000 00000000
diff --git a/board/freescale/t104xrdb/t1042d4_rcw.cfg b/board/freescale/t104xrdb/t1042d4_rcw.cfg
new file mode 100644
index 0000000..db4d52f
--- /dev/null
+++ b/board/freescale/t104xrdb/t1042d4_rcw.cfg
@@ -0,0 +1,7 @@
+#PBL preamble and RCW header
+aa55aa55 010e0100
+# serdes protocol 0x86
+0c18000e 0e000000 00000000 00000000
+86000002 80000002 ec027000 01000000
+00000000 00000000 00000000 00032810
+00000000 0342500f 00000000 00000000
diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c
index 9cd5e15..9d12942 100644
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -27,6 +27,10 @@ int checkboard(void)
{
struct cpu_type *cpu = gd->arch.cpu;
u8 sw;
+ ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u32 srds_s1;
+
+ srds_s1 = in_be32(&gur->rcwsr[4]) >> 24;
printf("Board: %sRDB\n", cpu->name);
printf("Board rev: 0x%02x CPLD ver: 0x%02x, ",
@@ -40,6 +44,16 @@ int checkboard(void)
else
printf("Unsupported Bank=%x\n", sw);
+ printf("SERDES Reference : 0x%X\n", srds_s1);
+
+ if (srds_s1 == 0x86)
+ /* choose SGMII */
+ CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) | 0x80);
+
+ if (srds_s1 == 0x8E)
+ /* choose SGMII & Aurora */
+ CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) | 0x82);
+
return 0;
}
@@ -49,8 +63,7 @@ int board_early_init_f(void)
if (is_warm_boot())
fsl_dp_disable_console();
#endif
-
- return 0;
+return 0;
}
int board_early_init_r(void)
diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig
new file mode 100644
index 0000000..72b046b
--- /dev/null
+++ b/configs/T1040D4RDB_NAND_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB"
++S:CONFIG_PPC=y
++S:CONFIG_MPC85xx=y
++S:CONFIG_TARGET_T104XRDB=y
diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig
new file mode 100644
index 0000000..9e63214
--- /dev/null
+++ b/configs/T1040D4RDB_SDCARD_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB"
++S:CONFIG_PPC=y
++S:CONFIG_MPC85xx=y
++S:CONFIG_TARGET_T104XRDB=y
diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig
new file mode 100644
index 0000000..e0ab015
--- /dev/null
+++ b/configs/T1040D4RDB_SPIFLASH_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB"
++S:CONFIG_PPC=y
++S:CONFIG_MPC85xx=y
++S:CONFIG_TARGET_T104XRDB=y
diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig
new file mode 100644
index 0000000..d650ab6
--- /dev/null
+++ b/configs/T1040D4RDB_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_T104XRDB=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
new file mode 100644
index 0000000..5e33654
--- /dev/null
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB"
++S:CONFIG_PPC=y
++S:CONFIG_MPC85xx=y
++S:CONFIG_TARGET_T104XRDB=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
new file mode 100644
index 0000000..7851a8b
--- /dev/null
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB"
++S:CONFIG_PPC=y
++S:CONFIG_MPC85xx=y
++S:CONFIG_TARGET_T104XRDB=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
new file mode 100644
index 0000000..536ea79
--- /dev/null
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB"
++S:CONFIG_PPC=y
++S:CONFIG_MPC85xx=y
++S:CONFIG_TARGET_T104XRDB=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
new file mode 100644
index 0000000..715697f
--- /dev/null
+++ b/configs/T1042D4RDB_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_T104XRDB=y
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 5263318..111bbfb 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -29,6 +29,14 @@
#ifdef CONFIG_T1042RDB
#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg
#endif
+#ifdef CONFIG_T1040D4RDB
+#define CONFIG_SYS_FSL_PBL_RCW \
+$(SRCTREE)/board/freescale/t104xrdb/t1040d4_rcw.cfg
+#endif
+#ifdef CONFIG_T1042D4RDB
+#define CONFIG_SYS_FSL_PBL_RCW \
+$(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
+#endif
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
@@ -219,8 +227,14 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
+#ifdef CONFIG_T104XD4RDB
+#define CONFIG_SYS_FSL_DDR4
+#endif
+
#define CONFIG_DDR_SPD
+#ifndef CONFIG_SYS_FSL_DDR4
#define CONFIG_SYS_FSL_DDR3
+#endif
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51
@@ -278,7 +292,7 @@
#define CPLD_LBMAP_DFLTBANK 0x40 /* BANK OR | BANK0 */
#define CPLD_LBMAP_RESET 0xFF
#define CPLD_LBMAP_SHIFT 0x03
-#ifdef CONFIG_T1042RDB_PI
+#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB)
#define CPLD_DIU_SEL_DFP 0x80
#endif
@@ -448,7 +462,7 @@
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#ifdef CONFIG_T1042RDB_PI
+#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB)
/* Video */
#define CONFIG_FSL_DIU_FB
@@ -493,11 +507,11 @@
/* I2C bus multiplexer */
#define I2C_MUX_PCA_ADDR 0x70
-#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
+#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB)
#define I2C_MUX_CH_DEFAULT 0x8
#endif
-#ifdef CONFIG_T1042RDB_PI
+#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB)
/* LDI/DVI Encoder for display */
#define CONFIG_SYS_I2C_LDI_ADDR 0x38
#define CONFIG_SYS_I2C_DVI_ADDR 0x75
@@ -666,7 +680,7 @@
#define CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_DPAA_PME
-#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
+#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB)
#define CONFIG_QE
#define CONFIG_U_QE
#endif
@@ -695,7 +709,7 @@
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
#endif
-#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
+#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB)
#if defined(CONFIG_SPIFLASH)
#define CONFIG_SYS_QE_FW_ADDR 0x130000
#elif defined(CONFIG_SDCARD)
@@ -720,10 +734,20 @@
#ifdef CONFIG_FMAN_ENET
#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
-#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03
+#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03
+#elif defined(CONFIG_T1040D4RDB) || defined(CONFIG_T1042D4RDB)
+#define CONFIG_SYS_SGMII1_PHY_ADDR 0x02
+#define CONFIG_SYS_SGMII2_PHY_ADDR 0x03
+#define CONFIG_SYS_SGMII3_PHY_ADDR 0x01
+#endif
+
+#ifdef CONFIG_T104XD4RDB
+#define CONFIG_SYS_RGMII1_PHY_ADDR 0x04
+#define CONFIG_SYS_RGMII2_PHY_ADDR 0x05
+#else
+#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01
+#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02
#endif
-#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01
-#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02
/* Enable VSC9953 L2 Switch driver on T1040 SoC */
#ifdef CONFIG_T1040RDB
@@ -842,6 +866,10 @@
#define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb"
#elif defined(CONFIG_T1042RDB)
#define FDTFILE "t1042rdb/t1042rdb.dtb"
+#elif defined(CONFIG_T1040D4RDB)
+#define FDTFILE "t1042rdb/t1040d4rdb.dtb"
+#elif defined(CONFIG_T1042D4RDB)
+#define FDTFILE "t1042rdb/t1042d4rdb.dtb"
#endif
#ifdef CONFIG_FSL_DIU_FB
--
1.7.9.5
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