[U-Boot] [PATCH] dm: ls1021a: Bring in ls1021a dts files from linux kernel
Haikun Wang
haikun.wang at freescale.com
Mon Mar 23 12:07:01 CET 2015
From: haikun <haikun.wang at freescale.com>
Bring in device tree files for ls1021a from linux V3.19.
In order to use it in u-boot, make some changes:
1. remove 'gic' node and interrupt related properties in every node.
2. remove 'clockgen' node and clock related properties in every node.
3. change address-cells and size-cells of root node and 'soc' node
from 2 to 1.
4. Add quadspi node.
Signed-off-by: Haikun Wang <Haikun.Wang at freescale.com>
---
arch/arm/dts/Makefile | 3 +
arch/arm/dts/ls1021a-qds.dts | 47 ++++++++
arch/arm/dts/ls1021a-twr.dts | 31 +++++
arch/arm/dts/ls1021a.dtsi | 265 +++++++++++++++++++++++++++++++++++++++++++
4 files changed, 346 insertions(+)
create mode 100644 arch/arm/dts/ls1021a-qds.dts
create mode 100644 arch/arm/dts/ls1021a-twr.dts
create mode 100644 arch/arm/dts/ls1021a.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index cbe5b86..67b821a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -54,6 +54,9 @@ dtb-$(CONFIG_SOCFPGA) += \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_socrates.dtb
+dtb-$(CONFIG_TARGET_LS1021AQDS) += ls1021a-qds.dtb
+dtb-$(CONFIG_TARGET_LS1021ATWR) += ls1021a-twr.dtb
+
targets += $(dtb-y)
DTC_FLAGS += -R 4 -p 0x1000
diff --git a/arch/arm/dts/ls1021a-qds.dts b/arch/arm/dts/ls1021a-qds.dts
new file mode 100644
index 0000000..9a06695
--- /dev/null
+++ b/arch/arm/dts/ls1021a-qds.dts
@@ -0,0 +1,47 @@
+/*
+ * Freescale ls1021a QDS board device tree source
+ *
+ * Copyright 2013-2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+#include "ls1021a.dtsi"
+
+/ {
+ model = "LS1021A QDS Board";
+
+ aliases {
+ spi0 = &qspi;
+ spi1 = &dspi0;
+ };
+};
+
+&dspi0 {
+ bus-num = <0>;
+ status = "okay";
+
+ dspiflash: at45db021d at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ spi-max-frequency = <16000000>;
+ spi-cpol;
+ spi-cpha;
+ reg = <0>;
+ };
+};
+
+&qspi {
+ bus-num = <0>;
+ status = "okay";
+
+ qflash0: s25fl128s at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+};
diff --git a/arch/arm/dts/ls1021a-twr.dts b/arch/arm/dts/ls1021a-twr.dts
new file mode 100644
index 0000000..db528f9
--- /dev/null
+++ b/arch/arm/dts/ls1021a-twr.dts
@@ -0,0 +1,31 @@
+/*
+ * Freescale ls1021a TWR board device tree source
+ *
+ * Copyright 2013-2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+#include "ls1021a.dtsi"
+
+/ {
+ model = "LS1021A TWR Board";
+
+ aliases {
+ spi0 = &qspi;
+ };
+};
+
+&qspi {
+ bus-num = <0>;
+ status = "okay";
+
+ qflash0: n25q128a13 at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+};
diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
new file mode 100644
index 0000000..e160a5d
--- /dev/null
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -0,0 +1,265 @@
+/*
+ * Freescale ls1021a SOC common device tree source
+ *
+ * Copyright 2013-2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "fsl,ls1021a";
+
+ aliases {
+ serial0 = &lpuart0;
+ serial1 = &lpuart1;
+ serial2 = &lpuart2;
+ serial3 = &lpuart3;
+ serial4 = &lpuart4;
+ serial5 = &lpuart5;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu at f00 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0xf00>;
+ };
+
+ cpu at f01 {
+ compatible = "arm,cortex-a7";
+ device_type = "cpu";
+ reg = <0xf01>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ };
+
+ pmu {
+ compatible = "arm,cortex-a7-pmu";
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges;
+
+
+ ifc: ifc at 1530000 {
+ compatible = "fsl,ifc", "simple-bus";
+ reg = <0x1530000 0x10000>;
+ };
+
+ dcfg: dcfg at 1ee0000 {
+ compatible = "fsl,ls1021a-dcfg", "syscon";
+ reg = <0x1ee0000 0x10000>;
+ big-endian;
+ };
+
+ esdhc: esdhc at 1560000 {
+ compatible = "fsl,esdhc";
+ reg = <0x1560000 0x10000>;
+ clock-frequency = <0>;
+ voltage-ranges = <1800 1800 3300 3300>;
+ sdhci,auto-cmd12;
+ big-endian;
+ bus-width = <4>;
+ status = "disabled";
+ };
+
+ scfg: scfg at 1570000 {
+ compatible = "fsl,ls1021a-scfg", "syscon";
+ reg = <0x1570000 0x10000>;
+ big-endian;
+ };
+
+
+ dspi0: dspi at 2100000 {
+ compatible = "fsl,vf610-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2100000 0x10000>;
+ num-cs = <6>;
+ big-endian;
+ status = "disabled";
+ };
+
+ dspi1: dspi at 2110000 {
+ compatible = "fsl,vf610-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2110000 0x10000>;
+ num-cs = <6>;
+ big-endian;
+ status = "disabled";
+ };
+
+ qspi: quadspi at 1550000 {
+ compatible = "fsl,vf610-qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x1550000 0x0 0x10000>,
+ <0x0 0x40000000 0x0 0x4000000>;
+ num-cs = <2>;
+ big-endian;
+ status = "disabled";
+ };
+
+ i2c0: i2c at 2180000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2180000 0x10000>;
+ status = "disabled";
+ };
+
+ i2c1: i2c at 2190000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2190000 0x10000>;
+ status = "disabled";
+ };
+
+ i2c2: i2c at 21a0000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x21a0000 0x10000>;
+ status = "disabled";
+ };
+
+ uart0: serial at 21c0500 {
+ compatible = "fsl,16550-FIFO64", "ns16550a";
+ reg = <0x21c0500 0x100>;
+ clock-frequency = <0>;
+ fifo-size = <15>;
+ status = "disabled";
+ };
+
+ uart1: serial at 21c0600 {
+ compatible = "fsl,16550-FIFO64", "ns16550a";
+ reg = <0x21c0600 0x100>;
+ clock-frequency = <0>;
+ fifo-size = <15>;
+ status = "disabled";
+ };
+
+ uart2: serial at 21d0500 {
+ compatible = "fsl,16550-FIFO64", "ns16550a";
+ reg = <0x21d0500 0x100>;
+ clock-frequency = <0>;
+ fifo-size = <15>;
+ status = "disabled";
+ };
+
+ uart3: serial at 21d0600 {
+ compatible = "fsl,16550-FIFO64", "ns16550a";
+ reg = <0x21d0600 0x100>;
+ clock-frequency = <0>;
+ fifo-size = <15>;
+ status = "disabled";
+ };
+
+ lpuart0: serial at 2950000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x2950000 0x1000>;
+ status = "disabled";
+ };
+
+ lpuart1: serial at 2960000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x2960000 0x1000>;
+ status = "disabled";
+ };
+
+ lpuart2: serial at 2970000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x2970000 0x1000>;
+ status = "disabled";
+ };
+
+ lpuart3: serial at 2980000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x2980000 0x1000>;
+ status = "disabled";
+ };
+
+ lpuart4: serial at 2990000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x2990000 0x1000>;
+ status = "disabled";
+ };
+
+ lpuart5: serial at 29a0000 {
+ compatible = "fsl,ls1021a-lpuart";
+ reg = <0x29a0000 0x1000>;
+ status = "disabled";
+ };
+
+ wdog0: watchdog at 2ad0000 {
+ compatible = "fsl,imx21-wdt";
+ reg = <0x2ad0000 0x10000>;
+ big-endian;
+ };
+
+ sai1: sai at 2b50000 {
+ compatible = "fsl,vf610-sai";
+ reg = <0x2b50000 0x10000>;
+ dma-names = "tx", "rx";
+ dmas = <&edma0 1 47>,
+ <&edma0 1 46>;
+ big-endian;
+ status = "disabled";
+ };
+
+ sai2: sai at 2b60000 {
+ compatible = "fsl,vf610-sai";
+ reg = <0x2b60000 0x10000>;
+ dma-names = "tx", "rx";
+ dmas = <&edma0 1 45>,
+ <&edma0 1 44>;
+ big-endian;
+ status = "disabled";
+ };
+
+ edma0: edma at 2c00000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x2c00000 0x10000>,
+ <0x2c10000 0x10000>,
+ <0x2c20000 0x10000>;
+ dma-channels = <32>;
+ big-endian;
+ };
+
+ mdio0: mdio at 2d24000 {
+ compatible = "gianfar";
+ device_type = "mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2d24000 0x4000>;
+ };
+
+ usb at 8600000 {
+ compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
+ reg = <0x8600000 0x1000>;
+ dr_mode = "host";
+ phy_type = "ulpi";
+ };
+
+ usb3 at 3100000 {
+ compatible = "snps,dwc3";
+ reg = <0x3100000 0x10000>;
+ dr_mode = "host";
+ };
+ };
+};
--
2.1.0.27.g96db324
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