[U-Boot] [PATCH v5 24/28] armv8/ls2085aqds: NAND boot support

York Sun yorksun at freescale.com
Tue Mar 24 16:45:07 CET 2015



On 03/23/2015 06:34 PM, Scott Wood wrote:
> On Fri, 2015-03-20 at 19:28 -0700, York Sun wrote:
>> +Generage NAND image
>> +-------------------
>> +To form the NAND image, build u-boot with LS2085AQDS_NAND_defconfig.
>> +Append u-boot-with-spl.bin after RCW image. The RCW image should
>> +have these PBI commands
>> +
>> +1) CCSR 4-byte write to 0x00e00404, data=0x00000000
>> +2) CCSR 4-byte write to 0x00e00400, data=0x1800a000
>> +3) Block Copy: SRC=0x0104, SRC_ADDR=0x000000c0, DEST_ADDR=0x1800a000,
>> +BLOCK_SIZE=0x00014000
> 
> The RCW source should probably be 0x107, not 0x104.  Bit 0x002 requests
> first/last bad block markers rather than first/second, and bit 0x001
> enables ECC.  Also, this documentation is LS2085A-specific (most of it
> will probably apply to all chips with this chassis), not RDB or QDS
> specific, with the exception of the RCW source ID which depends on the
> specific NAND chip.  It would be better to put it in one place rather
> than duplicate it, with a table of RCW source IDs for each board.
> 
> Also, you have RDB as having SRC=0x104, but that (as well as 0x107) is
> for a 2K-page NAND chip.  RDB has a 4K-page NAND, so I think you want
> RCW source to be 0x111.
> 

I will try your suggestion. I use the value from the original RCW we created
during bring-up. Oddly it still works if it is wrong.

York


More information about the U-Boot mailing list