[U-Boot] [PATCH 2/2] Add new Arcturus Networks Inc. board support - uCP1020
York Sun
yorksun at freescale.com
Fri Mar 27 19:43:02 CET 2015
Oleks,
On 03/27/2015 11:21 AM, Oleksandr G Zhadan wrote:
> Hi York,
> New, with fixed errors and much less warnings, patch is here.
It should be a new email. Otherwise, anything above the --- under signed-off-by
will be treated as commit message.
>
> On 03/26/2015 05:25 PM, York Sun wrote:
>>
>>
>> On 03/26/2015 02:14 PM, Oleksandr G Zhadan wrote:
>>> From: Oleksandr Zhadan <oleks at arcturusnetworks.com>
>>>
>>
>> Please add commit message to explain what you are doing.
>>
>> Please run checkpatch before sending it. You have tons of issues there.
>>
>> York
>>
>>
>
> From: Oleksandr Zhadan <oleks at arcturusnetworks.com>
> Date: Fri, 27 Mar 2015 14:04:21 -0400
> Subject: [PATCH 2/2] New Arcturus Networks board support.
>
Missing commit message here.
>
> Signed-off-by: Oleksandr Zhadan <oleks at ivyking.arcturusnetworks.com>
> Signed-off-by: Michael Durrant <mdurrant at arcturusnetworks.com>
> ---
>
> arch/powerpc/cpu/mpc85xx/Kconfig | 4 +
> board/Arcturus/ucp1020/Kconfig | 44 ++
> board/Arcturus/ucp1020/MAINTAINERS | 7 +
> board/Arcturus/ucp1020/Makefile | 33 +
> board/Arcturus/ucp1020/README | 54 ++
> board/Arcturus/ucp1020/cmd_arc.c | 261 ++++++++
> board/Arcturus/ucp1020/ddr.c | 162 +++++
> board/Arcturus/ucp1020/law.c | 25 +
> board/Arcturus/ucp1020/spl.c | 126 ++++
> board/Arcturus/ucp1020/spl_minimal.c | 67 ++
> board/Arcturus/ucp1020/tlb.c | 101 ++++
> board/Arcturus/ucp1020/ucp1020.c | 393 ++++++++++++
> configs/UCP1020_SPIFLASH_defconfig | 6 +
> configs/UCP1020_defconfig | 5 +
> include/configs/UCP1020.h | 1096
> ++++++++++++++++++++++++++++++++++
> 15 files changed, 2384 insertions(+), 0 deletions(-)
> create mode 100644 board/Arcturus/ucp1020/Kconfig
> create mode 100644 board/Arcturus/ucp1020/MAINTAINERS
> create mode 100644 board/Arcturus/ucp1020/Makefile
> create mode 100644 board/Arcturus/ucp1020/README
> create mode 100644 board/Arcturus/ucp1020/cmd_arc.c
> create mode 100644 board/Arcturus/ucp1020/ddr.c
> create mode 100644 board/Arcturus/ucp1020/law.c
> create mode 100644 board/Arcturus/ucp1020/spl.c
> create mode 100644 board/Arcturus/ucp1020/spl_minimal.c
> create mode 100644 board/Arcturus/ucp1020/tlb.c
> create mode 100644 board/Arcturus/ucp1020/ucp1020.c
> create mode 100644 configs/UCP1020_SPIFLASH_defconfig
> create mode 100644 configs/UCP1020_defconfig
> create mode 100644 include/configs/UCP1020.h
I think it is best to generate this patch with -M -C --find-copies-harder flag.
There is a lot of copy and paste from existing board.
<snip>
> diff --git a/board/Arcturus/ucp1020/cmd_arc.c
> b/board/Arcturus/ucp1020/cmd_arc.c
> new file mode 100644
> index 0000000..13ac25e
> --- /dev/null
> +++ b/board/Arcturus/ucp1020/cmd_arc.c
> @@ -0,0 +1,261 @@
> +/*
> + * Command for accessing Arcturus factory environment.
> + *
> + * Copyright 2013-2015 Arcturus Networks Inc.
> + * http://www.arcturusnetworks.com/products/ucp1020/
> + * by Oleksandr G Zhadan et al.
> + *
> + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
> + *
> + */
> +
> +#include <common.h>
> +#include <div64.h>
> +#include <malloc.h>
> +#include <spi_flash.h>
> +
> +#include <asm/io.h>
> +
> +#ifndef CONFIG_SF_DEFAULT_SPEED
> +# define CONFIG_SF_DEFAULT_SPEED 1000000
> +#endif
> +#ifndef CONFIG_SF_DEFAULT_MODE
> +# define CONFIG_SF_DEFAULT_MODE SPI_MODE0
> +#endif
> +#ifndef CONFIG_SF_DEFAULT_CS
> +# define CONFIG_SF_DEFAULT_CS 0
> +#endif
> +#ifndef CONFIG_SF_DEFAULT_BUS
> +# define CONFIG_SF_DEFAULT_BUS 0
> +#endif
> +
> +static struct spi_flash *flash;
> +char smac[4][18];
> +
> +static int set_arc_product(int argc, char *const argv[])
> +{
> + int err = 0;
> +
> + if (argc != 5)
> + return -1;
> +
> + if (strlen(argv[1]) != 15)
> + return -1;
> +
> + if (strlen(argv[2]) != 17)
> + return -1;
> +
> + if (strlen(argv[3]) != 17)
> + return -1;
> +
> + if (strlen(argv[4]) != 17)
> + return -1;
> +
Are these magical number documented? It will be more understandable if using
macros or with comments.
> + if (argv[2][2]
> + != ':' || argv[2][5]
> + != ':' || argv[2][8] != ':' || argv[2][11] != ':' ||
> + argv[2][14] != ':')
> + return -1;
> +
> + if (argv[3][2]
> + != ':' || argv[3][5]
> + != ':' || argv[3][8] != ':' || argv[3][11] != ':' ||
> + argv[3][14] != ':')
> + return -1;
> +
> + if (argv[4][2]
> + != ':' || argv[4][5]
> + != ':' || argv[4][8] != ':' || argv[4][11] != ':' ||
> + argv[4][14] != ':')
> + return -1;
> +
> + strcpy(smac[3], argv[1]);
> + strcpy(smac[2], argv[2]);
> + strcpy(smac[1], argv[3]);
> + strcpy(smac[0], argv[4]);
> +
> + flash =
> + spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
> + CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
> +
> + if (spi_flash_write(flash, (0x200 - sizeof(smac)), sizeof(smac), smac)) {
> + printf
I don't see this style before. Not sure if it is allowed. Let's wait for others
to comment.
> + ("%s: ERROR: Failed to save factory info in spi locations 1\n",
> + __func__);
> + err++;
> + }
> + if (spi_flash_write(flash, (0x400 - sizeof(smac)), sizeof(smac), smac)) {
> + printf
> + ("%s: ERROR: Failed to save factory info in spi locations 2\n",
> + __func__);
> + err++;
> + }
> +
> + if (spi_flash_write
> + (flash, (CONFIG_ENV_SECT_SIZE + 0x200 - sizeof(smac)), sizeof(smac),
> + smac)) {
> + printf
> + ("%s: ERROR: Failed to save factory info in spi locations 3\n",
> + __func__);
> + err++;
> + }
> +
> + if (spi_flash_write
> + (flash, (CONFIG_ENV_SECT_SIZE + 0x400 - sizeof(smac)), sizeof(smac),
> + smac)) {
> + printf
> + ("%s: ERROR: Failed to save factory info in spi locations 3\n",
> + __func__);
> + err++;
> + }
> +
> + if (err == 4) {
> + printf
> + ("%s: ERROR: Failed to write to any of all possible factory info
> spi locations\n",
> + __func__);
> + return -2;
> + }
> +
> + if (err > 0)
> + printf
> + ("%s: WARNING: Failed to write to %d of all possible factory info
> spi locations\n",
> + __func__, err);
> +
> + return 0;
> +}
> +
> +int get_arc_info(void)
> +{
> + int ret, location = 1;
> +
> + flash =
> + spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
> + CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
> +
> + ret = spi_flash_read(flash, (0x200 - sizeof(smac)), sizeof(smac), smac);
> + if (ret) {
> + location++;
> + ret =
This style is odd to me.
<snip>
> diff --git a/board/Arcturus/ucp1020/ddr.c b/board/Arcturus/ucp1020/ddr.c
> new file mode 100644
> index 0000000..a9cbf95
> --- /dev/null
> +++ b/board/Arcturus/ucp1020/ddr.c
> @@ -0,0 +1,162 @@
> +/*
> + * Copyright 2013-2015 Arcturus Networks, Inc.
> + * http://www.arcturusnetworks.com/products/ucp1020/
> + * by Oleksandr G Zhadan et al.
> + * based on board/freescale/p1_p2_rdb_pc/spl.c
> + * original copyright follows:
> + * Copyright 2013 Freescale Semiconductor, Inc.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <asm/mmu.h>
> +#include <asm/immap_85xx.h>
> +#include <asm/processor.h>
> +#include <fsl_ddr_sdram.h>
> +#include <fsl_ddr_dimm_params.h>
> +#include <asm/io.h>
> +#include <asm/fsl_law.h>
> +
> +#ifdef CONFIG_SYS_DDR_RAW_TIMING
> +#if defined(CONFIG_UCP1020) || defined(CONFIG_UCP1020T1)
> +/*
> + * Micron MT41J128M16HA-15E
> + * */
> +dimm_params_t ddr_raw_timing = {
> + .n_ranks = 1,
> + .rank_density = 536870912u,
> + .capacity = 536870912u,
> + .primary_sdram_width = 32,
> + .ec_sdram_width = 8,
> + .registered_dimm = 0,
> + .mirrored_dimm = 0,
> + .n_row_addr = 14,
> + .n_col_addr = 10,
> + .n_banks_per_sdram_device = 8,
> + .edc_config = 2,
> + .burst_lengths_bitmask = 0x0c,
> +
> + .tckmin_x_ps = 1650,
> + .caslat_x = 0x7e << 4, /* 5,6,7,8,9,10 */
> + .taa_ps = 14050,
> + .twr_ps = 15000,
> + .trcd_ps = 13500,
> + .trrd_ps = 75000,
> + .trp_ps = 13500,
> + .tras_ps = 40000,
> + .trc_ps = 49500,
> + .trfc_ps = 160000,
> + .twtr_ps = 75000,
> + .trtp_ps = 75000,
> + .refresh_rate_ps = 7800000,
> + .tfaw_ps = 30000,
> +};
> +
> +#else
> +#error Missing raw timing data for this board
> +#endif
> +
> +int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
> + unsigned int controller_number,
> + unsigned int dimm_number)
> +{
> + const char dimm_model[] = "Fixed DDR on board";
> +
> + if ((controller_number == 0) && (dimm_number == 0)) {
> + memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t));
> + memset(pdimm->mpart, 0, sizeof(pdimm->mpart));
> + memcpy(pdimm->mpart, dimm_model, sizeof(dimm_model) - 1);
> + }
> +
> + return 0;
> +}
> +#endif /* CONFIG_SYS_DDR_RAW_TIMING */
> +
> +#ifdef CONFIG_SYS_DDR_CS0_BNDS
> +/* Fixed sdram init -- doesn't use serial presence detect. */
> +phys_size_t fixed_sdram(void)
Do you really need the fixed parameters? You have RAW timing method above.
<snip>
> +
> +#define CONFIG_CMD_DTT
> +
> +/*
> + * These can be toggled for performance analysis, otherwise use default.
> + */
> +#define CONFIG_L2_CACHE
> +#define CONFIG_BTB
> +
> +#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */
> +
> +#define CONFIG_ENABLE_36BIT_PHYS
> +
> +#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
> +#define CONFIG_SYS_MEMTEST_END 0x1fffffff
> +#define CONFIG_PANIC_HANG /* do not reset board on panic */
> +
> +#define CONFIG_SYS_CCSRBAR 0xffe00000
> +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
> +
> +/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in
> the 4k
> + SPL code*/
> +#ifdef CONFIG_SPL_BUILD
> +#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
> +#endif
> +
> +/* DDR Setup */
> +#define CONFIG_DDR_ECC_ENABLE
> +#define CONFIG_SYS_FSL_DDR3
> +#ifndef CONFIG_DDR_ECC_ENABLE
> +#define CONFIG_SYS_DDR_RAW_TIMING
> +#define CONFIG_DDR_SPD
> +#endif
> +#define CONFIG_SYS_SPD_BUS_NUM 1
> +#undef CONFIG_FSL_DDR_INTERACTIVE
> +
> +#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
You still have P1020 stuff copied here.
> +#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G
> +#define CONFIG_CHIP_SELECTS_PER_CTRL 2
> +#else
> +#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_512M
> +#define CONFIG_CHIP_SELECTS_PER_CTRL 1
> +#endif
> +#define CONFIG_SYS_SDRAM_SIZE (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
> +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
> +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
> +
> +#define CONFIG_NUM_DDR_CONTROLLERS 1
> +#define CONFIG_DIMM_SLOTS_PER_CTLR 1
> +
> +/* Default settings for DDR3 */
> +#ifndef CONFIG_UCP2020
> +#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f
Do you really use fixed parameters? Do you use them for NAND boot?
> +#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302
> +#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
> +#define CONFIG_SYS_DDR_CS1_BNDS 0x0040007f
> +#define CONFIG_SYS_DDR_CS1_CONFIG 0x80014302
> +#define CONFIG_SYS_DDR_CS1_CONFIG_2 0x00000000
> +
> +#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef
> +#define CONFIG_SYS_DDR_INIT_ADDR 0x00000000
> +#define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x00000000
> +#define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000
> +
> +#define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600
> +#define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8655A608
> +#define CONFIG_SYS_DDR_SR_CNTR 0x00000000
> +#define CONFIG_SYS_DDR_RCW_1 0x00000000
> +#define CONFIG_SYS_DDR_RCW_2 0x00000000
> +#ifdef CONFIG_DDR_ECC_ENABLE
> +#define CONFIG_SYS_DDR_CONTROL 0xE70C0000 /* Type = DDR3 & ECC */
> +#else
> +#define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */
> +#endif
> +#define CONFIG_SYS_DDR_CONTROL_2 0x04401050
> +#define CONFIG_SYS_DDR_TIMING_4 0x00220001
> +#define CONFIG_SYS_DDR_TIMING_5 0x03402400
> +
> +#define CONFIG_SYS_DDR_TIMING_3 0x00020000
> +#define CONFIG_SYS_DDR_TIMING_0 0x00330004
> +#define CONFIG_SYS_DDR_TIMING_1 0x6f6B4846
> +#define CONFIG_SYS_DDR_TIMING_2 0x0FA8C8CF
> +#define CONFIG_SYS_DDR_CLK_CTRL 0x03000000
> +#define CONFIG_SYS_DDR_MODE_1 0x40461520
> +#define CONFIG_SYS_DDR_MODE_2 0x8000c000
> +#define CONFIG_SYS_DDR_INTERVAL 0x0C300000
> +#endif
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