[U-Boot] [PATCH 1/2] stv0991: fdt: add stv0991 device tree
Vikas Manocha
vikas.manocha at st.com
Sat May 2 00:43:04 CEST 2015
Signed-off-by: Vikas Manocha <vikas.manocha at st.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/stv0991.dts | 23 +++++++++++++++++++++++
configs/stv0991_defconfig | 1 +
include/configs/stv0991.h | 3 +++
4 files changed, 28 insertions(+)
create mode 100644 arch/arm/dts/stv0991.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 46a6171..86faf58 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -54,6 +54,7 @@ dtb-$(CONFIG_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_socrates.dtb
+dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \
ls1021a-twr.dtb
diff --git a/arch/arm/dts/stv0991.dts b/arch/arm/dts/stv0991.dts
new file mode 100644
index 0000000..b25c48b
--- /dev/null
+++ b/arch/arm/dts/stv0991.dts
@@ -0,0 +1,23 @@
+/dts-v1/;
+
+/ {
+ model = "ST STV0991 application board";
+ compatible = "st,stv0991";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ memory {
+ device_type="memory";
+ reg = <0x0 0x198000>;
+ };
+
+ uart0: serial at 0x80406000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x80406000 0x1000>;
+ clock = <2700000>;
+ };
+};
diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index 76ba41b..d9edc06 100644
--- a/configs/stv0991_defconfig
+++ b/configs/stv0991_defconfig
@@ -5,3 +5,4 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ETH_DESIGNWARE=y
CONFIG_NETDEVICES=y
CONFIG_NET=y
+CONFIG_DEFAULT_DEVICE_TREE="stv0991"
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index 2f65eda..750eebd 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -80,4 +80,7 @@
#define CONFIG_AUTOBOOT_PROMPT \
"Hit SPACE in %d seconds to stop autoboot.\n", bootdelay
#undef CONFIG_HAS_VBAR
+#define CONFIG_OF_EMBED
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_LIBFDT
#endif /* __CONFIG_H */
--
1.7.9.5
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