[U-Boot] [PATCH] sunxi: add support for UART2 on A23/A33

[Hans de Goede]

Hi,

On 06-05-15 02:02, Laurent Itti wrote:
> Add support for UART2 (2-pin version but note that RTS/CTS pins are available
> pn that port for possible future use), can be selected in config
> by using CONFIG_CONS_INDEX=3
>
> Signed-off-by: Laurent Itti <laurentitti at gmail.com>

Thanks I've added this to my sunxi-wip branch minus the dtsi change,
the dtsi change is not necessary for u-boot (as we do not use
dts for uart pinmuxing for now), and dts changes should go through the
upstream kernel.

Note that a patch series adding a33 dts / kernel support has been posted
upstream recently, see:

https://lkml.org/lkml/2015/5/10/3

You should probably do your patch as a patch on top of that series,
adding the new pinmux info to sun8i-a33.dtsi.

I'll include this patch in my next pull-req for merging into the
official u-boot repo.

Regards,

Hans



> ---
>   arch/arm/cpu/armv7/sunxi/board.c       | 4 ++++
>   arch/arm/dts/sun8i-a23.dtsi            | 7 +++++++
>   arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
>   include/configs/sunxi-common.h         | 2 ++
>   4 files changed, 14 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
> index 76a52ac..550ea46 100644
> --- a/arch/arm/cpu/armv7/sunxi/board.c
> +++ b/arch/arm/cpu/armv7/sunxi/board.c
> @@ -72,6 +72,10 @@ static int gpio_init(void)
>   	sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
>   	sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
>   	sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
> +	sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
> +	sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
> +	sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
>   #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
>   	sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
>   	sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
> diff --git a/arch/arm/dts/sun8i-a23.dtsi b/arch/arm/dts/sun8i-a23.dtsi
> index 6d6eda3..19f851d 100644
> --- a/arch/arm/dts/sun8i-a23.dtsi
> +++ b/arch/arm/dts/sun8i-a23.dtsi
> @@ -359,6 +359,13 @@
>   				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
>   			};
>
> +			uart2_pins_a: uart0 at 2 {
> +				allwinner,pins = "PB0", "PB1";
> +				allwinner,function = "uart2";
> +				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> +				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> +			};
> +
>   			mmc0_pins_a: mmc0 at 0 {
>   				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
>   				allwinner,function = "mmc0";
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 081e7d1..496295d 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -155,6 +155,7 @@ enum sunxi_gpio_number {
>   #define SUN5I_GPB_TWI2		2
>   #define SUN4I_GPB_UART0		2
>   #define SUN5I_GPB_UART0		2
> +#define SUN8I_GPB_UART2		2
>
>   #define SUNXI_GPC_SDC2		3
>   #define SUN6I_GPC_SDC3		4
> diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
> index 5d77e71..c7b4bd4 100644
> --- a/include/configs/sunxi-common.h
> +++ b/include/configs/sunxi-common.h
> @@ -306,6 +306,8 @@ extern int soft_i2c_gpio_scl;
>   #endif
>   #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
>   #define OF_STDOUT_PATH		"/soc at 01c00000/serial at 01c28400:115200"
> +#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
> +#define OF_STDOUT_PATH		"/soc at 01c00000/serial at 01c28800:115200"
>   #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
>   #define OF_STDOUT_PATH		"/soc at 01c00000/serial at 01f02800:115200"
>   #else
>