[U-Boot] [PATCH 1/2] ARMv7: Factor out reusable timer_wait from sunxi/psci.S

[Chen-Yu Tsai]

Hi,

On Wed, May 13, 2015 at 1:59 PM, Dongsheng Wang
<dongsheng.wang at freescale.com> wrote:
> From: Wang Dongsheng <dongsheng.wang at freescale.com>
>
> timer_wait is moved from sunxi/psci.S, and it can be converted completely
> into a reusable armv7 generic timer. LS1021A will use it as well.
>
> Signed-off-by: Wang Dongsheng <dongsheng.wang at freescale.com>
> ---
> This patch depend on Jan Kiszka <jan.kiszka at siemens.com> patches.
>
> Jan Kiszka patches link:
> http://patchwork.ozlabs.org/project/uboot/list/?submitter=710&state=*
>
> diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci.S
> index 7ec0500..6f4c762 100644
> --- a/arch/arm/cpu/armv7/sunxi/psci.S
> +++ b/arch/arm/cpu/armv7/sunxi/psci.S
> @@ -18,6 +18,8 @@
>   */
>
>  #include <config.h>
> +
> +#include <asm/arch-armv7/generictimer.h>
>  #include <asm/gic.h>
>  #include <asm/macro.h>
>  #include <asm/psci.h>
> @@ -43,26 +45,6 @@
>  #define        GICD_BASE               0x1c81000
>  #define        GICC_BASE               0x1c82000
>
> -.macro timer_wait      reg, ticks
> -       @ Program CNTP_TVAL
> -       movw    \reg, #(\ticks & 0xffff)
> -       movt    \reg, #(\ticks >> 16)
> -       mcr     p15, 0, \reg, c14, c2, 0
> -       isb
> -       @ Enable physical timer, mask interrupt
> -       mov     \reg, #3
> -       mcr     p15, 0, \reg, c14, c2, 1
> -       @ Poll physical timer until ISTATUS is on
> -1:     isb
> -       mrc     p15, 0, \reg, c14, c2, 1
> -       ands    \reg, \reg, #4
> -       bne     1b
> -       @ Disable timer
> -       mov     \reg, #0
> -       mcr     p15, 0, \reg, c14, c2, 1
> -       isb
> -.endm
> -
>  .globl psci_fiq_enter
>  psci_fiq_enter:
>         push    {r0-r12}
> diff --git a/arch/arm/include/asm/arch-armv7/generictimer.h b/arch/arm/include/asm/arch-armv7/generictimer.h
> new file mode 100644
> index 0000000..9cf4105
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-armv7/generictimer.h
> @@ -0,0 +1,41 @@
> +/*
> + * Copyright 2015 Freescale Semiconductor, Inc.
> + * Author: Wang Dongsheng <dongsheng.wang at freescale.com>

Since you are only moving code, without making substantial
changes to it, don't you think you should keep the original
author's (Marc Zyngier CC-ed) copyright here?

ChenYu

> + *
> + * SPDX-License-Identifier:    GPL-2.0+
> + */
> +#ifndef _GENERICTIMER_H_
> +#define _GENERICTIMER_H_
> +
> +#ifdef __ASSEMBLY__
> +
> +/*
> + * This macro provide a physical timer that can be used for delay in the code.
> + * The macro is moved from sunxi/psci.S
> + *
> + * reg: is used in this macro.
> + * ticks: The freq is based on generic timer.
> + */
> +.macro timer_wait      reg, ticks
> +       @ Program CNTP_TVAL
> +       movw    \reg, #(\ticks & 0xffff)
> +       movt    \reg, #(\ticks >> 16)
> +       mcr     p15, 0, \reg, c14, c2, 0
> +       isb
> +       @ Enable physical timer, mask interrupt
> +       mov     \reg, #3
> +       mcr     p15, 0, \reg, c14, c2, 1
> +       @ Poll physical timer until ISTATUS is on
> +1:     isb
> +       mrc     p15, 0, \reg, c14, c2, 1
> +       ands    \reg, \reg, #4
> +       bne     1b
> +       @ Disable timer
> +       mov     \reg, #0
> +       mcr     p15, 0, \reg, c14, c2, 1
> +       isb
> +.endm
> +
> +#endif /* __ASSEMBLY__ */
> +
> +#endif /* _GENERICTIMER_H_ */
> --
> 2.1.0.27.g96db324
>
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