[U-Boot] [PATCH 5/6] mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.

[Peter Griffin]

Hi Marek,

On Tue, 12 May 2015, Marek Vasut wrote:

> On Tuesday, May 12, 2015 at 03:38:31 PM, Peter Griffin wrote:
> > This patch adds the glue code for hi6220 SoC which has 2x synopsis
> > dw_mmc controllers. This will be used by the hikey board support
> > in subsequent patches.
> > 
> > Signed-off-by: Peter Griffin <peter.griffin at linaro.org>
> 
> [...]
> 
> > diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
> > new file mode 100644
> > index 0000000..a3880a3
> > --- /dev/null
> > +++ b/drivers/mmc/hi6220_dw_mmc.c
> > @@ -0,0 +1,63 @@
> > +/*
> > + * (C) Copyright 2015 Linaro
> > + * peter.griffin <peter.griffin at linaro.org>
> > + *
> > + * SPDX-License-Identifier:	GPL-2.0+
> > + */
> > +
> > +#include <common.h>
> > +#include <dwmmc.h>
> > +#include <malloc.h>
> > +#include <asm-generic/errno.h>
> > +
> > +#define	DWMMC_MAX_CH_NUM		4
> > +
> > +/*
> > +#define	DWMMC_MAX_FREQ			52000000
> > +#define	DWMMC_MIN_FREQ			400000
> > +*/
> 
> Please zap these dead macros.

Ok will fix in v2.
> 
> > +/*TODO we should probably use the frequencies above, but ATF uses
> > +  the ones below so stick with that for the moment */
> > +#define	DWMMC_MAX_FREQ			50000000
> > +#define	DWMMC_MIN_FREQ			378000
> > +
> > +/* Source clock is configured to 100Mhz by ATF bl1*/
> > +#define MMC0_DEFAULT_FREQ		100000000
> 
> [...]
> 
> > +int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)
> > +{
> > +	struct dwmci_host *host = NULL;
> > +
> > +	host = malloc(sizeof(struct dwmci_host));
> 
> calloc(1, sizeof(...)) so the data are inited/zero'd out please.
> [...]

Ok will fix in v2

regards,

Peter.