[U-Boot] [PATCH v2 1/4] mx6: add OTP bank1 registers
Nikolay Dimitrov
picmaster at mail.bg
Mon May 18 00:32:25 CEST 2015
Hi Tim,
On 05/14/2015 08:11 AM, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey at gateworks.com>
> ---
> arch/arm/include/asm/arch-mx6/imx-regs.h | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
> index 9a4ad8b..35bb005 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -640,6 +640,25 @@ struct fuse_bank0_regs {
> u32 rsvd7[3];
> };
>
> +struct fuse_bank1_regs {
> + u32 mem0;
> + u32 rsvd0[3];
> + u32 mem1;
> + u32 rsvd1[3];
> + u32 mem2;
> + u32 rsvd2[3];
> + u32 mem3;
> + u32 rsvd3[3];
> + u32 mem4;
> + u32 rsvd4[3];
> + u32 ana0;
> + u32 rsvd5[3];
> + u32 ana1;
> + u32 rsvd6[3];
> + u32 ana2;
> + u32 rsvd7[3];
> +};
> +
> #ifdef CONFIG_MX6SX
> struct fuse_bank4_regs {
> u32 sjc_resp_low;
>
U-Boot 2015.07-rc1-21804-gaf1db4a-dirty (May 18 2015 - 01:26:05)
CPU: Freescale i.MX6SOLO rev1.1 996 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 59C
Reset cause: POR
Board: RIoTboard
Tested-by: Nikolay Dimitrov <picmaster at mail.bg>
Regards,
Nikolay
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