[U-Boot] [PATCH] ARM: atmel: switch to usb ehci for sama5d3 boards

Josh Wu josh.wu at atmel.com
Tue May 19 12:54:39 CEST 2015


From: Bo Shen <voice.shen at atmel.com>

As the cache coherence issue in OHCI HCD, when enable I/D cache
for sama5d3 SoC, the OHCI can not work properly. So, switch to
EHCI, then the USB can work well.

Signed-off-by: Bo Shen <voice.shen at atmel.com>
[rebase to mainline]
Signed-off-by: Josh Wu <josh.wu at atmel.com>
---

 include/configs/sama5d3_xplained.h | 21 +++------------------
 include/configs/sama5d3xek.h       | 21 +++------------------
 2 files changed, 6 insertions(+), 36 deletions(-)

diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index bfd8aa7..0dab15d 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -20,17 +20,6 @@
 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
 #define CONFIG_USART_ID			ATMEL_ID_DBGU
 
-/*
- * This needs to be defined for the OHCI code to work but it is defined as
- * ATMEL_ID_UHPHS in the CPU specific header files.
- */
-#define ATMEL_ID_UHP			ATMEL_ID_UHPHS
-
-/*
- * Specify the clock enable bit in the PMC_SCER register.
- */
-#define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
-
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
@@ -95,13 +84,9 @@
 #define CONFIG_CMD_USB
 
 #ifdef CONFIG_CMD_USB
-#define CONFIG_USB_ATMEL
-#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
-#define CONFIG_USB_OHCI_NEW
-#define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"SAMA5D3 Xplained"
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
 #define CONFIG_DOS_PARTITION
 #define CONFIG_USB_STORAGE
 #endif
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index d933a9e..d3ab6e4 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -24,17 +24,6 @@
 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
 #define	CONFIG_USART_ID			ATMEL_ID_DBGU
 
-/*
- * This needs to be defined for the OHCI code to work but it is defined as
- * ATMEL_ID_UHPHS in the CPU specific header files.
- */
-#define ATMEL_ID_UHP			ATMEL_ID_UHPHS
-
-/*
- * Specify the clock enable bit in the PMC_SCER register.
- */
-#define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
-
 /* LCD */
 #define CONFIG_LCD
 #define LCD_BPP				LCD_COLOR16
@@ -128,13 +117,9 @@
 #define CONFIG_CMD_USB
 
 #ifdef CONFIG_CMD_USB
-#define CONFIG_USB_ATMEL
-#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
-#define CONFIG_USB_OHCI_NEW
-#define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"sama5d3"
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
 #define CONFIG_DOS_PARTITION
 #define CONFIG_USB_STORAGE
 #endif
-- 
1.9.1



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