[U-Boot] [PATCH] MIPS: fix missing semicolon in cacheops.h
Tony Wu
tung7970 at gmail.com
Sat May 30 09:02:39 CEST 2015
Fix missing semicolon in cacheops.h introduced in commit
2b8bcc5a2 (MIPS: avoid .set ISA for cache operations)
Signed-off-by: Tony Wu <tung7970 at gmail.com>
Cc: Paul Burton <paul.burton at imgtec.com>
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 75ec380..af2adc7 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -18,7 +18,7 @@ static inline void mips_cache(int op, const volatile void *addr)
#ifdef __GCC_HAVE_BUILTIN_MIPS_CACHE
__builtin_mips_cache(op, addr);
#else
- __asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr))
+ __asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr));
#endif
}
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