[U-Boot] [Patch V2 4/4] armv8/ls1043aqds: dts: add dtb support

[Gong Qianyu]

Reuse the dts files from ls1043a linux kernel.

Signed-off-by: Gong Qianyu <Qianyu.Gong at freescale.com>
---
V2:
 - New Patch.

 arch/arm/dts/Makefile            |   3 +-
 arch/arm/dts/fsl-ls1043a-qds.dts | 204 +++++++++++++++++++++++++++++++++++++++
 configs/ls1043aqds_defconfig     |   2 +
 3 files changed, 208 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3f3a739..2aa9a00 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -83,7 +83,8 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \
 	ls1021a-twr.dtb
 dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2085a-qds.dtb \
 	fsl-ls2085a-rdb.dtb
-dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-rdb.dtb
+dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \
+	fsl-ls1043a-rdb.dtb
 
 dtb-$(CONFIG_MACH_SUN4I) += \
 	sun4i-a10-a1000.dtb \
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dts b/arch/arm/dts/fsl-ls1043a-qds.dts
new file mode 100644
index 0000000..4bf9b1b
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1043a-qds.dts
@@ -0,0 +1,204 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright (C) 2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu at freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+/include/ "fsl-ls1043a.dtsi"
+
+/ {
+	model = "LS1043A QDS Board";
+};
+
+&i2c0 {
+	status = "okay";
+	pca9547 at 77 {
+		compatible = "philips,pca9547";
+		reg = <0x77>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		i2c at 0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0>;
+
+			rtc at 68 {
+				compatible = "dallas,ds3232";
+				reg = <0x68>;
+				/* IRQ10_B */
+				interrupts = <0 150 0x4>;
+			};
+		};
+
+		i2c at 2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x2>;
+
+			ina220 at 40 {
+				compatible = "ti,ina220";
+				reg = <0x40>;
+				shunt-resistor = <1000>;
+			};
+
+			ina220 at 41 {
+				compatible = "ti,ina220";
+				reg = <0x41>;
+				shunt-resistor = <1000>;
+			};
+		};
+
+		i2c at 3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x3>;
+
+			eeprom at 56 {
+				compatible = "at24,24c512";
+				reg = <0x56>;
+			};
+
+			eeprom at 57 {
+				compatible = "at24,24c512";
+				reg = <0x57>;
+			};
+
+			adt7461a at 4c {
+				compatible = "adt7461a";
+				reg = <0x4c>;
+			};
+		};
+	};
+};
+
+&ifc {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	/* NOR, NAND Flashes and FPGA on board */
+	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
+		  0x2 0x0 0x0 0x7e800000 0x00010000
+		  0x3 0x0 0x0 0x7fb00000 0x00000100>;
+	status = "okay";
+
+	nor at 0,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cfi-flash";
+		reg = <0x0 0x0 0x8000000>;
+		bank-width = <2>;
+		device-width = <1>;
+
+		partition at 0 {
+			/* 1MB for RCW and PBI Image */
+			reg = <0x00000000 0x00100000>;
+			label = "NOR bank0 RCW Image";
+		};
+
+		partition at 100000 {
+			/* 1MB for bank0 u-boot Image */
+			reg = <0x00100000 0x00100000>;
+			label = "NOR bank0 U-Boot Image";
+		};
+
+		partition at 200000 {
+			/* 1 MB for bank0 u-boot Env */
+			reg = <0x00200000 0x00100000>;
+			label = "NOR bank0 U-Boot Env";
+		};
+
+		partition at 300000 {
+			/* 1MB for FMan ucode */
+			reg = <0x00300000 0x00100000>;
+			label = "NOR bank0 FMan ucode";
+		};
+
+		partition at 1100000 {
+			/* 40MB for bank0 FIT Image */
+			reg = <0x01100000 0x2800000>;
+			label = "NOR bank0 FIT Image";
+		};
+
+		partition at 4000000 {
+			/* 1MB for bank4 RCW and PBI Image */
+			reg = <0x04000000 0x100000>;
+			label = "NOR bank4 RCW Image";
+		};
+
+		partition at 4100000 {
+			/* 1MB for bank4 u-boot Image */
+			reg = <0x04100000 0x100000>;
+			label = "NOR bank4 U-Boot Image";
+		};
+
+		partition at 4200000 {
+			/* 1 MB for bank4 u-boot Env */
+			reg = <0x04200000 0x100000>;
+			label = "NOR bank4 U-Boot Env";
+		};
+
+		partition at 4300000 {
+			/* 1 MB for bank4 FMan ucode */
+			reg = <0x04300000 0x100000>;
+			label = "NOR bank4 FMan ucode";
+		};
+
+		partition at 5100000 {
+			/* 40MB for bank4 FIT Image */
+			reg = <0x05100000 0x2800000>;
+			label = "NOR bank4 FIT Image";
+		};
+	};
+
+	nand at 2,0 {
+		compatible = "fsl,ifc-nand";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x2 0x0 0x10000>;
+
+		partition at 0 {
+			/* This location must not be altered  */
+			/* 1MB for u-boot Bootloader Image */
+			reg = <0x0 0x00100000>;
+			label = "NAND U-Boot Image";
+			read-only;
+		};
+
+		partition at 140000 {
+			/* 1MB for DTB Image */
+			reg = <0x00140000 0x002000>;
+			label = "NAND U-Boot Env";
+		};
+
+		partition at 200000 {
+			/* 20MB for FIT Image */
+			reg = <0x00200000 0x01400000>;
+			label = "NAND FIT Image";
+		};
+	};
+
+	fpga: board-control at 3,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		reg = <0x3 0x0 0x0000100>;
+		bank-width = <1>;
+		device-width = <1>;
+		ranges = <0 3 0 0x100>;
+	};
+};
+
+&duart0 {
+	status = "okay";
+};
+
+&duart1 {
+	status = "okay";
+};
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index ee5bea2..cf163d6 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -1,3 +1,5 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds"
+CONFIG_OF_CONTROL=y
-- 
2.1.0.27.g96db324