[U-Boot] [PATCH v5 1/6] cgtqmx6eval: Add SPI NOR flash support

[Jagan Teki]

On 30 October 2015 at 16:04, Otavio Salvador <otavio at ossystems.com.br> wrote:
> Add SPI NOR support:
>
> => sf probe
> SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB
>
> Signed-off-by: Otavio Salvador <otavio at ossystems.com.br>
> ---
>
> Changes in v5: None
> Changes in v4: None
>
>  board/congatec/cgtqmx6eval/cgtqmx6eval.c | 23 +++++++++++++++++++++++
>  include/configs/cgtqmx6eval.h            | 12 ++++++++++++
>  2 files changed, 35 insertions(+)
>
> diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
> index cf5607b..18e408b 100644
> --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
> +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
> @@ -45,6 +45,10 @@ DECLARE_GLOBAL_DATA_PTR;
>         PAD_CTL_DSE_40ohm | PAD_CTL_HYS |                       \
>         PAD_CTL_ODE | PAD_CTL_SRE_FAST)
>
> +#define SPI_PAD_CTRL (PAD_CTL_HYS |                            \
> +       PAD_CTL_SPEED_MED |             \
> +       PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
> +
>  #define MX6Q_QMX6_PFUZE_MUX            IMX_GPIO_NR(6, 9)
>
>
> @@ -152,6 +156,13 @@ static iomux_v3_cfg_t enet_pads_ar8035[] = {
>         MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
>  };
>
> +static iomux_v3_cfg_t const ecspi1_pads[] = {
> +       MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
> +       MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
> +       MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
> +       MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),
> +};
> +
>  #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
>  struct i2c_pads_info i2c_pad_info1 = {
>         .scl = {
> @@ -381,6 +392,12 @@ static void setup_iomux_uart(void)
>         imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
>  }
>
> +void setup_spinor(void)
> +{
> +       imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
> +       gpio_direction_output(IMX_GPIO_NR(3, 19), 0);
> +}
> +

As this init stuff is related to MXC better to move this with
CONFIG_MXC_SPI defined.

>  #ifdef CONFIG_FSL_ESDHC
>  static struct fsl_esdhc_cfg usdhc_cfg[] = {
>         {USDHC2_BASE_ADDR},
> @@ -646,6 +663,7 @@ int board_early_init_f(void)
>  {
>         setup_iomux_uart();
>         setup_display();
> +       setup_spinor();
>
>         return 0;
>  }
> @@ -671,6 +689,11 @@ int checkboard(void)
>         return 0;
>  }
>
> +int board_spi_cs_gpio(unsigned bus, unsigned cs)
> +{
> +       return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -EINVAL;
> +}
> +
>  #ifdef CONFIG_CMD_BMODE
>  static const struct boot_mode board_boot_modes[] = {
>         /* 4 bit bus width */
> diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
> index e0aa4b0..9aa66c7 100644
> --- a/include/configs/cgtqmx6eval.h
> +++ b/include/configs/cgtqmx6eval.h
> @@ -29,6 +29,16 @@
>  /* MMC Configs */
>  #define CONFIG_SYS_FSL_ESDHC_ADDR      0
>
> +/* SPI NOR */
> +#define CONFIG_CMD_SF
> +#define CONFIG_SPI_FLASH
> +#define CONFIG_SPI_FLASH_STMICRO
> +#define CONFIG_SPI_FLASH_SST
> +#define CONFIG_MXC_SPI
> +#define CONFIG_SF_DEFAULT_BUS          0
> +#define CONFIG_SF_DEFAULT_SPEED                20000000
> +#define CONFIG_SF_DEFAULT_MODE         (SPI_MODE_0)
> +
>  /* Miscellaneous commands */
>  #define CONFIG_CMD_BMODE
>
> @@ -200,8 +210,10 @@
>                 "else " \
>                         "bootz; " \
>                 "fi;\0" \
> +       "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
>
>  #define CONFIG_BOOTCOMMAND \
> +       "run spilock;"      \
>         "mmc dev ${mmcdev};" \
>         "if mmc rescan; then " \
>                 "if run loadbootscript; then " \
> --
> 2.6.2
>
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-- 
Jagan | openedev.