[U-Boot] [PATCH v1 0/7] Enable high speed and heavy load for DDR4 for LSCH3

[York Sun]

This patch set revises the DDR driver to support higher speed for DDR4
under heavy load (two dual-rank DIMMs) for four-chipselect interleaving.
Single quad-rank DIMM is not supported yet.


York Sun (7):
  driver/ddr/fsl: Update DDR4 RTT values
  driver/ddr/fsl: Update DDR4 MR6 for Vref range
  driver/ddr/fsl: Update MR5 RTT park
  driver/ddr/fsl: Update workaround for A008511 for vref range
  driver/ddr/fsl: Update timing config for heavy load
  armv8/ls2085aqds: Update DDR settings for four chip-select case
  armv8/ls2085ardb: Update DDR settings for four chip-select case

 board/freescale/ls2085aqds/ddr.c |   16 ++-
 board/freescale/ls2085ardb/ddr.c |   16 ++-
 drivers/ddr/fsl/ctrl_regs.c      |   48 +++++++-
 drivers/ddr/fsl/fsl_ddr_gen4.c   |   22 ++--
 drivers/ddr/fsl/options.c        |  237 +++++++++++++++++++++++++++++++++++++-
 include/fsl_ddr_sdram.h          |    9 ++
 6 files changed, 325 insertions(+), 23 deletions(-)

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1.7.9.5